TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 397

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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PCIC
16.4.6. P2G Memory Space (m) Configuration Register
This register configures Memory Space of PCI memory windows (m=0,1,2) Lower Base Address Register at offset address
0x10[18h, 20h] of the PCI Configuration Space.
The size of PCI Memory Window is defined by the value of P2GM(m)CFG.MSS. The Effective Base Address (EBA) is given
by following formula,
EBA [31:20] = P2GM(m)PLBASE.BA & P2GM(m)CFG.MSS ( bitwise AND )
This register is accessible both in Host Mode and Satellite Mode.
Rev. 3.1 November 1, 2005
Bit
31:16
15:13
12:4
3
2:0
Default
Default
NAME
NAME
TYPE
TYPE
P2GM0CFG, P2GM1CFG, P2GM2CFG
MSS[31:20]
0xFFC
0xFC0
0xFE0
0xFFE
0xFFF
0xE00
0xF00
0xF80
0xFF0
0xFF8
Mnemonic
MSS [31:29]
MSS [28:20]
PFCFG
R/O
R/O
31
15
0
1
MSS [31:29]
R/O
R/O
30
14
0
1
Table 16-20 Corresponding of Memory Space Size and MSS[31:20] Value
31
1
1
1
1
1
1
1
1
1
1
Field Name
RESERVED
Size (Maximum)
Size
Prefetchable
Configuration
RESERVED
R/O
R/O
29
13
0
1
Figure 16-19 P2G Memory Space (m) Configuration (m=0,1,2)
Table 16-19 P2G Memory Space (m) Configuration (m=0,1,2)
30
1
1
1
1
1
1
1
1
1
1
R/O
R/W
1/0
28
12
0
29
1
1
1
1
1
1
1
1
1
1
R/W
R/O
1/0
27
11
0
28
0
1
1
1
1
1
1
1
1
1
Description
See Table 16-20 for other corresponding.
The default values of MSS[28:20] for the three configuration
registers are
P2GM0CFG Default: 9’h000
P2GM1CFG Default: 9’h1F0
P2GM2CFG Default: 9’h1FF
Prefetchable Configuration
1: Indicates that memory is prefetchable.
0: Indicates that memory is not prefetchable.
The default values of PFCFG for the three configuration registers
are
P2GM0CFG Default: 1
P2GM1CFG Default: 1
P2GM2CFG Default:0
Memory Space Size (Maximum, Default=3'b111, 512 MB).
Memory Space Size
R/W
R/O
1/0
26
10
0
27
0
0
1
1
1
1
1
1
1
1
R/W
R/O
1/0
25
26
0
9
0
0
0
1
1
1
1
1
1
1
16-33
MSS [28:20]
RESERVED
R/W
R/O
25
1/0
24
0
0
0
0
1
1
1
1
1
1
0
8
24
R/W
R/O
1/0
0
0
0
0
0
1
1
1
1
1
23
0
7
23
0
0
0
0
0
0
1
1
1
1
R/W
R/O
1/0
22
0
6
22
0
0
0
0
0
0
0
1
1
1
R/W
R/O
1/0
21
0
5
21
0
0
0
0
0
0
0
0
1
1
R/W
R/O
1/0
20
0
4
Toshiba RISC Processor
20
PFCFG
0
0
0
0
0
0
0
0
0
1
R/W
R/O
1/0
19
0
3
29
28
27
26
25
24
23
22
21
20
n
R/O
R/O
18
0
2
0
Default
0x0000
3'b111
1/0
1/0
0x0
Memory Size
RESERVED
512 MB
256 MB
128 MB
64 MB
32 MB
16 MB
8 MB
4 MB
2 MB
1 MB
R/O
R/O
17
0
1
0
TX4939
R/W
R/O
R/O
R/W
R/W
R/O
R/O
R/O
16
0
0
0
16
16

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