TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 440

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

PCIC
16.4.58. PDMAC G-Bus Address Register (PDMGA)
Rev. 3.1 November 1, 2005
Bits
63:36
35:2
1:0
Default
Default
Default
Default
NAME
NAME
NAME
NAME
TYPE
TYPE
TYPE
TYPE
Mnemonic
PDMGA
63
47
31
15
62
46
30
14
Field Name
Rsvd
G-Bus Address
Rsvd
61
45
29
13
60
44
28
12
Figure 16-69 G-Bus Address Register
59
43
27
11
Table 16-71 G-Bus Address Register
Description
PDMAC G-Bus Address (Default is undefined)
The G-Bus DMA transfer address is specified by a G-Bus physical address on
a 32-bit address boundary. This register value is used for G-Bus Read access
during DMA transfer from the G-Bus to the PCI Bus, or it is used for G-Bus
Write access during DMA transfer from the PCI Bus to the G-Bus.
This register value is held without being affected by a Reset.
RESERVED
58
42
26
10
PDMGA[15:2]
57
41
25
Undefined
9
16-76
R/W
PDMGA[31:16]
RESERVED
Undefined
56
40
24
8
R/W
55
39
23
7
54
38
22
6
53
37
21
5
52
36
20
Toshiba RISC Processor
4
51
35
19
3
PDMGA[35:32]
50
34
Undefined
18
2
R/W
49
33
17
Reserved
1
R/W
⎯
R/W
⎯
TX4939
48
32
16
0
16
16