TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 512

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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EMAC
18.3.8. MAC operation
This subsection describes MAC operation in detail with respect to the following content:
18.3.8.1. Format of MAC frames and packets
Figure 18-10 shows the format of IEEE 802.3 Ethernet packets. Standard packets have the following fields.
Rev. 3.1 November 1, 2005
Format of MAC frames and packets
Initializing MAC
Access MAC Registers
Frame transmission procedure
Frame reception procedure
Operation of the address recognition circuit (ARC)
Pause operation in full duplex transfers
Signaling transmission/reception errors
Accessing station management data
Preamble— repeat the same byte 7 times
Each byte is fixed to 10101010 and is transmitted from left to right. The preamble is sometimes shortened
during transmission and is not necessary when receiving data.
Start Frame Delimiter (SFD)— 1 Byte
The SFD is fixed to 10101011 and is transmitted from left to right. It is necessary when receiving data.
Recipient address— 6 Bytes
This is a unicast or multicast address. ARC can use the recipient address and can freely perform address
filtering.
Sender address— 6 Bytes
MAC does not check the sender address. However, to make the sender address a valid station address, the first
bit (LSB) of the first Byte transmitted must be “0”.
Frame length or frame type— 2 Bytes
Is transmitted upper byte first. In the IEEE802.3 standard, a value of 1500 or less is defined as the frame length,
and any value greater than 1535 is defined as the frame type. If the value is 1500 or less, it indicates the byte
count of the logic link control (LLC) data in the Data field. MAC recognizes 8808h as the MAC control frame and
specially recognizes 8100h as a tagged VLAN frame.
Logic link control (LLC) data— 0-1500 Bytes
LLC data consists of two fields: User Data and Pad Data.
User Data— 0-1500 Bytes
Pad Data— 0-46 Bytes
When the user data is less than 46 Bytes long, MAC can add padding bytes and make the LLC data 46 Bytes
long.
1 Byte
Deleted by MAC Rx Part
Added by MAC Tx Part
Preamble
7 Bytes
...
1 Byte
1 Byte
SFD
Transmission Packet (Encoded in media by MAC transmission part_
Recipient
Figure 18-10 Ethernet Packet Frame Fields
Address
6 Bytes
Tx Data Frame (Transmitted by MAC Client)
Rx Data Frame (Transmit to MAC Client)
Address
Sender
6 Bytes
Rx Packet (Received from media by MAC Rx Part)
18-20
Upper
1 Byte 1 Byte 0-1500 Bytes 0-46 Bytes
Frame Length,
Frame Type
Lower
User
LLC Data
Pad
Added by MAC Tx Part
Toshiba RISC Processor
MSB
Deleted by Rx Part
CRC (FCS)
4 Bytes
LSB
TX4939
18
18

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