TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 589

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

SIO
19.4.7. Baud Rate Control Register 0,1,2,3
This register selects the clock that is provided to the baud rate generator and set the divide value.
Rev. 3.1 November 1, 2005
Bit
31:10
9:8
7:0
31
15
Mnemonic
BCLK
BRD
(SIBGR0, SIBGR1, SIBGR2, SIBGR3)
Channel
SIO0
SIO1
SIO2
SIO3
Reserved
Field Name
Reserved
Baud Rate
Generator
Clock
Baud Rate
Divide Value
Table 19-18 Address offsets for Baud Rate Control Register in TX4939
Address Offset
0xF318
0xF418
0xF398
0xF498
Baud Rate Generator Clock (Default: 11)
This field sets the input clock for the baud rate generator.
00: Select prescalar output T0 (IMBUSCLK/2)
01: Select prescalar output T2 (IMBUSCLK/8)
10: Select prescalar output T4 (IMBUSCLK/32)
11: Select prescalar output T6 (IMBUSCLK/128)
Baud Rate Divide Value (Default: 0xFF)
This field set divide value BRG of the baud rate generator. This value is
expressed as a binary value.
Description
10
Figure 19-12 Baud Rate Control Register
Table 19-19 Baud Rate Control Register
9
Mnemonic
SIBGR0
SIBGR1
SIBGR2
SIBGR3
BCLK
R/W
11
Reserved
8
19-23
7
Register Name
Baud Rate Control Register 0
Baud Rate Control Register 1
Baud Rate Control Register 2
Baud Rate Control Register 3
0xFF
BRD
R/W
Toshiba RISC Processor
16
0
: Initial value
: Initial value
Read/Write
⎯
R/W
R/W
: Type
: Type
TX4939
19
19