TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 599

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

SPI
20.3.6. Buffer configuration
The SPI Module has a Transmitter Buffer and a Receiver Buffer. The buffers use FIFOs to store data. Each FIFO can store
4-frame data.
The Transmitter Buffer stores the value written to the SPI Data Register. Either when in the Idle state or when the current
transmission is complete, the first data written to the Transmitter Buffer is transferred to the Shift Register.
On the other hand, data received in the Shift Register is stored in the Receiver Buffer each time transfer ends.
You can issue interrupts each time data equal in size to the data in the buffer accumulates.
20.3.7. SPI system errors
The SPI Module signals the following system errors during transfer.
20.3.7.1. Overrun error (SPOE)
An overrun error is issued when an attempt is made to write the next data to the Transmitter Buffer regardless of whether the
Transmitter Buffer is full. The data to be newly written at this time is not written to the Transmitter Buffer. Also, the SPOE bit
of the SPSR Register becomes “1”.
20.3.8. Interrupts
The SPI Module has three types of interrupt sources. The result of OR operation performed on three interrupt sources is
inputted to the Interrupt Controller (IRC) as SPI interrupts. Check the SPI Status Register (SPSR) to see which interrupts
occurred.
Use System errors or Idle interrupts for error detection or Idle state interrupts. Use Receiver Buffer Fill interrupts and
Transmitter Buffer Fill interrupts when setting new transmission data to the buffer or when reading receiver data from the
buffer.
Rev. 3.1 November 1, 2005
Type
System error or idle
Receive Buffer Fill
Transmit Buffer Fill
RBSI
TBSI
Status bits
SPOE, SIDLE
20-7
Mask-able bit
SOEIE, SILIE
RBSIE
TBSIE
Toshiba RISC Processor
TX4939
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