TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 634

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

I2S
23.3.2. DMA Channel Mapping:
I2SC controller uses three DMA request channels. There is a dedicated DMA channel for each port.
For 2 channel i/o mode
For 3 Channel Output mode
23.3.3. DMA Operation:
Setup DMA Channel will be the same as AC-link Controller.
For an output channel, assign an i2s channel address to DMAC destination address register (DMDARn).
For an input channel, assign an i2s channel address to DMAC source address register (DMSARn).
The lower 16 bit address for i2s channels are :
Rev. 3.1 November 1, 2005
I2S channel #0 uses DMAC1 port #0
I2S channel #1 uses DMAC1 port #1
I2S channel #0 uses DMAC1 port #0
I2S channel #1 uses DMAC1 port #1
I2S channel #2 uses DMAC1 port #2
Channel 0 : xFA80
Channel 1 : xFA90
Channel 2 : xFAA0
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Toshiba RISC Processor
TX4939
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