TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 648

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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ACLINK
Rev. 3.1 November 1, 2005
Read from DMA buffer and update
Dummy read from data register to
clear pending DMA request if any
Register setting such as gain (*)
Stop updating DMA descriptor
DMA descriptor (repeatedly)
Disable receive-data DMA
enable receive-data DMA
Check completion status
Start DMA Channel and
Check AC’97 status
System Sftware
Start up AC-link
Clear DMA buffer
Configure DMAC
Disable ENLINK
Enable ENLINK
(*) Register settings such as volume can be made during data playback.
Figure 24-5 Audio Recording Process Flow
Completion interrupt (repeatedly)
Start receiving data from slot
DMAC channel goes inactive
DMAC generates Transfer
DMA overrun error occurs
Receive-data DMA halts
Start receive-data DMA
CODECRDY Interrupt
ACLC and DMAC
Deassert ACRESET*
Assert ACRESET *
24-6
Toshiba RISC Processor
ADC Ready response
Start recording audio
Set CODEC Ready
Send sample data
Start BITCLK
Set gain, etc.
Stop BITCLK
Stop AC-link
AC’97
TX4939
24
24

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