TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 664

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

ACLINK
Rev. 3.1 November 1, 2005
Bit
16
15
14
13
12
11
10
9
8
7:5
4
3
2
1
Mnemonic Field Name
AUDOEHLT
MODIDMA
MODODMA
Disable Audio
PCM L&R
Transmit-data
DMA Error Halt
Disable Modem
Receive-data DMA
Disable Modem
Transmit-data
DMA
Reserved
—
—
—
—
—
Reserved
—
—
—
—
Description
AUDOEHLT: Disable Audio PCM L&R Transmit-data DMA Error Halt.
MODIDMA: Disable Modem Receive-data DMA.
MODODMA: Disable Modem Transmit-data DMA.
AUDIDMA: Disable Audio Receive-data DMA.
LFEDMA: Disable Audio LFE Transmit-data DMA.
CENTDMA: Disable Audio Center Transmit-data DMA.
SURRDMA: Disable Audio Surround L&R Transmit-data DMA.
AUDODMA: Disable Audio PCM L&R Transmit-data DMA.
MICSEL: MIC Selection
WRESET: Deassert Warm Reset.
WAKEUP: Disable Wake-up.
LOWPWR: Disable AC-link Low-power Mode.
W1C
W1C
W1C
W1C
W1C
W1C
W1C
W1C
W1C
W1C
Note : The software must guarantee the warm reset assertion time
W1C
W1C
Table 24-12 ACCTLDIS Register
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
meets the AC’97 specification (1.0 µs or more).
0:
1:
0:
1:
No effect
Disables AUDODMA error halt.
AUDODMA request(s) will continue to be issued even
after AUDODMA underrun occurs.
No effect
Disables modem receive-data DMA.
No effect
Disables modem transmit-data DMA.
No effect
Disables audio receive-data DMA.
No effect
Disables audio LFE transmit-data DMA.
No effect
Disables audio Center transmit-data DMA.
No effect
Disables audio Surround L&R transmit-data DMA.
No effect
Disables audio PCM L&R transmit-data DMA.
No effect
Selects PCM L&R (Slot 3&4) for audio reception
No effect
Deasserts warm reset.
No effect
Disables wake-up from low-power mode.
No effect
Releases SYNC and SDOUT signals from low.
24-22
Toshiba RISC Processor
Read/Write
W1C
W1C
W1C
⎯
W1C
W1C
W1C
W1C
W1C
⎯
W1C
W1C
W1C
W1C
TX4939
24
24