TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 733

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Electrical
28.4.8.2. Multiword DMA data transfer
Rev. 3.1 November 1, 2005
Write Data
DD [15:0]
CS[1:0]#
DA[2:0]
DMARQ
DMACK#
DIOR#
DIOW#
Read Data
DD [15:0]
(Tc = 0 - 85°C, VDD33 = 3.3 V ± 0.2 V, VDD25 = 2.5 V ± 0.2 V, VDDC = 1.2 V ± 0.062 V, VSS = 0 V)
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
NOTE : t
0
D
E
F
G
H
J
K
KR
KW
LR
LW
M
N
Z
Cycle time
DIOR-/DIOW- asserted pulse width
DIOR- data access
DIOR- data hold
DIOR-/DIOW- data setup
DIOW- data hold
DMACK to DIOR-/DIOW- setup
DIOR-/DIOW- to DMACK hold
DIOR- negated pulse width
DIOW- negated pulse width
DIOR- to DMARQ delay
DIOW- to DMARQ delay
CS(1:0) valid to DIOR-/DIOW-
CS(1:0) hold
DMACK- to read data released
t
A host shall lengthen t
devices IDENTIFY DEVICE data.
0
K
Multiword DMA timing parameters
is the minimum total cycle time, t
(t
KR
or t
t
L
KW
Figure 28-16 Multiword DMA data Transfer to/from device
, as appropriate) is the minimum DIOR-/DIOW- negation time.
t
t
ATA100 Multiword DMA Transfer to/from Device
M
E
t
D
t
t
G
G
D
and/or t
t
t
t
H
KR
F
/ t
KW
K
(min)
(min)
to ensure that t
(min)
(max)
(min)
(max)
(max)
t
(max)
D
(min)
(min)
O
(min)
(min)
(min)
(min)
Valid
is the minimum DIOR-/DIOW- assertion time, and
(min)
28-17
0
is equal to the value reported in the
Mode 0
t
480
215
150
100
215
120
ns
LR
20
20
50
40
50
15
20
5
0
/ t
LW
Mode 1
150
ns
80
60
30
15
50
50
40
40
30
10
25
5
0
5
t
L
Toshiba RISC Processor
Mode 2
120
ns
70
50
20
10
25
25
35
35
25
10
25
5
0
5
t
N
t
Z
see note
see note
see note
see note
Note
TX4939
28
28