TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 95

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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CG
5.1. Overview
Figure 5-1 shows the top view of TX4939 internal clock generation structure. TX4939 generates all necessary clocks out
of single 20 MHz clock source. There are two clock input, i.e. MSTCLK and MSTCLK2.
MSTCLK can be modulated by internal SSCG Modulator and the modulated clock is fed to the Primary Clock Generator.
The Primary CG generates 400 MHz clock and divider generates 100 MHz and 66.66 MHz.
This 66.66 MHz clock is fed to Secondary Clock Generator, which generates CPUCLK, GBUSCLK, DDR Clock, and forth.
The CPUCLK frequency and the ratio between CPUCLK and GBUS/DDR Clock are defined at boot configuration. See
Chapter 4. Boot Configuration.
The 66.66 MHz is also used for PCI Clock either 66.66 MHz or 33.33 MHz. This PCI Clock distribution does not have any
synchronization with PCI Logic. It simply serves as PCI Clock source. There are four (4) PCI Service Clocks.
Instead, the clock signal input to the PCICLKIN terminal has synchronizer (De-Skew Circuit), where automatically internal
PCI clock synchronizes with this input clock.
Rev. 3.1 November 1, 2005
System
Clock Source
20MHz
CG
TX4939
MSTCLK2
MSTCLK
Div 2
Div 2
Figure 5-1 Overview of Clocking System in TX4939
Modulation 0.5%
Frequency 30 KHz
266.66 MHz
300.00 MHz
333.33 MHz
366.66 MHz
400.00 MHz
433.33 MHz
466.66 MHz
Modulator
Modulator
SSCG
SSCG
PCI Service Clocks
33/66 MHz
SSCGEN
33/66 MHz
5-1
Chapter 5. Clock Generators
PLL
PLL
PLL
Secondary Clock
Secondary Clock
Primary Clock
Primary Clock
PCICLKIN
Audio Clock
Audio Clock
Generator
Generator
Generator
Generator
Generator
Generator
PLL
PCI CG
Clock
FS*512 CH0
FS*512 CH1
Baud rate
CLK4MHz
ATA100 100MHz
PCI 66.6MHz
CPUCLK (266 – 400)
GBUS Clock
DDR Clock
IMBUS Clock
EBC Clock
Tree
Toshiba RISC Processor
Logic
PCI
TX4939
Rev 1.2
5
5
5
5

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