S1D13505 Epson Electronics America, Inc., S1D13505 Datasheet - Page 200
S1D13505
Manufacturer Part Number
S1D13505
Description
LCD Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13505.pdf
(566 pages)
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Page 46
7.3 Limitations
7.3.1 Updating Hardware Cursor Addresses
7.3.2 Reg[29h] And Reg[2Bh]
7.3.3 Reg [30h]
7.3.4
7.4 Examples
S1D13505
X23A-G-003-07
No Top/Left Clipping on Hardware Cursor
Note
There are limitations for using the hardware cursor/ink layer which should be noted.
All hardware cursor addresses must be set during VNDP (vertical non-display period).
Check the VNDP status bit (REG[0Ah] bit 7) to determine if you are in VNDP, then update
the cursor address register.
Bit seven of registers [29h] and [2Bh] are write only, and must always be set to zero as
setting these bits to one, will cause undefined cursor behavior.
Bit 7 of register [30h] is write only, therefore programs cannot determine the current
cursor/ink layer start address by reading register [30h]. It is suggested that values written
to this register be stored elsewhere and used when the current state of this register is
required.
The S1D13505 does not clip the hardware cursor on the top or left edges of the display. For
cursor shapes where the hot spot is not the upper left corner of the image (the hourglass for
instance), the cursor image will have to be modified to clip the cursor shape.
See Section 12, “Sample Code” for hardware cursor programming examples.
Ink/Cursor Start Address Bits [7:0]
Bit 7 is write only, when reading back the register this bit reads a '0'.
Table 7-2: Cursor/Ink Start Address Encoding
1 - FFh
0
Display Buffer Size - (n * 8192)
Display Buffer Size - 1024
Start Address (Bytes)
Epson Research and Development
Programming Notes and Examples
Vancouver Design Center
Issue Date: 01/02/05
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