adsp-bf539bbcz-5f8 Analog Devices, Inc., adsp-bf539bbcz-5f8 Datasheet - Page 53
adsp-bf539bbcz-5f8
Manufacturer Part Number
adsp-bf539bbcz-5f8
Description
Blackfin Embedded Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-BF539BBCZ-5F8.pdf
(60 pages)
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Capacitive Loading
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see
(nominal) = 3.3 V.
Page 54
tance. The delay and hold specifications given should be de-
rated by a factor derived from these figures. The graphs in these
figures may not be linear outside the ranges shown.
Figure 43. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Figure 44. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
14
12
10
12
10
8
6
4
2
0
8
6
4
2
0
0
0
show how output rise and fall times vary with capaci-
50
50
Driver A at V
Figure 43 on Page 53
Driver A at V
Figure
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
100
100
42). V
DDEXT
DDEXT
RISE TIME
RISE TIME
= 3.65 V (MAX)
= 2.7 V (MIN)
LOAD
150
150
is 1.5 V for V
through
FALL TIME
FALL TIME
200
200
Figure 52 on
Rev. A | Page 53 of 60 | February 2008
DDEXT
250
250
Figure 45. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Figure 46. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
Figure 47. Typical Rise and Fall Times (10% to 90%) vs. Load Capacitance for
12
10
10
30
25
20
15
10
8
6
4
2
0
9
8
7
6
5
4
3
2
1
0
5
0
0
0
0
50
50
50
ADSP-BF539/ADSP-BF539F
Driver B at V
Driver B at V
Driver C at V
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
LOAD CAPACITANCE (pF)
100
100
100
DDEXT
RISE TIME
DDEXT
DDEXT
RISE TIME
RISE TIME
= 3.65 V (MAX)
= 2.7 V (MIN)
= 2.7 V (MIN)
150
150
150
FALL TIME
FALL TIME
FALL TIME
200
200
200
250
250
250
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