saf1761 NXP Semiconductors, saf1761 Datasheet - Page 75
saf1761
Manufacturer Part Number
saf1761
Description
Hi-speed Universal Serial Bus On-the-go Controller
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1761.pdf
(166 pages)
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Table 71.
Table 72.
SAF1761_1
Product data sheet
Bit
DW0
31
30 to 29
28 to 18
17 to 3
2 to 1
0
Bulk
I/O
I/O
Start and complete split for bulk: bit description
SE description
Symbol
EndPt[0]
reserved
MaximumPacket
Length[10:0]
NrBytesTo
Transfer[14:0]
reserved
V
8.5.5 Start and complete split for isochronous
Control
I/O
I/O
Table 73
isochronous Transfer Descriptor (siTD).
Access
SW — writes
-
SW — writes
SW — writes
-
SW — sets
HW — resets
shows the bit allocation for start and complete split for isochronous, split
S
1
0
Rev. 01 — 18 November 2009
Value Description
-
-
-
-
-
-
Endpoint: This is the USB address of the endpoint within the
function.
-
Maximum Packet Length: This field indicates the maximum
number of bytes that can be sent to or received from an
endpoint in a single data packet. The maximum packet size for
full-speed is 64 bytes as defined in
Bus Specification Rev.
Number of Bytes to Transfer: This field indicates the number
of bytes that can be transferred by this data structure. It is used
to indicate the depth of the DATA field.
-
Valid:
0 — This bit is deactivated when the entire PTD is executed, or
when a fatal error is encountered.
1 — Software updates to one when there is payload to be sent
or received. The current PTD is active.
…continued
E
0
0
2.0”.
Hi-Speed USB OTG controller
Remarks
low-speed
full-speed
Ref. 1 “Universal Serial
SAF1761
© NXP B.V. 2009. All rights reserved.
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