saf1760 NXP Semiconductors, saf1760 Datasheet - Page 24
saf1760
Manufacturer Part Number
saf1760
Description
Saf1760 Hi-speed Universal Serial Bus Host Controller For Embedded Applications
Manufacturer
NXP Semiconductors
Datasheet
1.SAF1760.pdf
(110 pages)
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SAF1760_1
Product data sheet
When using the integrated analog overcurrent detection, the range of the overcurrent
detection voltage for the SAF1760 is 45 mV to 120 mV. Calculation of external
components should be based on the 45 mV value, with the actual overcurrent detection
threshold usually positioned in the middle of the interval.
For an overcurrent limit of 500 mA per port, a PMOS transistor with R
approximately 100 m is required. If a PMOS transistor with a lower R
analog overcurrent detection can be adjusted using a series resistor; see
The digital overcurrent scheme requires using an external power switch with integrated
overcurrent detection, such as LM3526, MIC2526 (2 ports) or LM3544 (4 ports). These
devices are controlled by PSWn_N signals corresponding to each port. In the case of
overcurrent occurrence, these devices will assert OCn_N signals. On OCn_N assertion,
the SAF1760 cuts off the port power by de-asserting PSWn_N. The external integrated
power switch will also automatically cut off the port power in the case of an overcurrent
event, by implementing a thermal shutdown. An internal delay filter will prevent false
overcurrent reporting because of in-rush currents when plugging a USB device. Because
of this internal delay, as soon as OCn_N is asserted, PSWn_N will switch off the external
PMOS in less than 15 ms.
Fig 6.
V
I
OC(nom)
PMOS
V
PMOS
(1) R
= V
Adjusting analog overcurrent detection limit (optional)
= 1 A
= voltage drop on PMOS
adj(oc)
TRIP(OC)
is optional.
Rev. 01 — 9 November 2009
= V
5 V
TRIP(intrinsic)
REF5V
(I
OC(nom)
SAF1760
Embedded Hi-Speed USB host controller
PSWn_N
R
adj(oc)
), where:
OCn_N
R adj(oc) (1)
001aai637
I OC
DSon
SAF1760
DSon
© NXP B.V. 2009. All rights reserved.
Figure
of
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6.
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