hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 82
hi-6131pqtf
Manufacturer Part Number
hi-6131pqtf
Description
Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
Manufacturer
QuickLogic Corp
Datasheet
1.HI-6131PQTF.pdf
(271 pages)
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Bit No.
15
14
13
13
11
Mnemonic
BC RUN
RETRY 1
RETRY 0
BADMSG
MSTATSET
R/W
R
R
R
R
Reset
0
0
0
0
HOLT INTEGRATED CIRCUITS
Function
BC Run / Stop
This is a status bit, not a condition code. This bit indicates whether the
BC is running or stopped. The bit is set to logic 1 when the BCSTRT
bit 13 in the Master Configuration Register is asserted and the BCENA
input pin and BCENA bit 12 in the Master Configuration Register 0x0000
are both logic 1.
Once set, this bit resets to logic 0 if the BCENA input pin or BCENA
register bit are reset to logic 0 by the host, or if the BC executes the
HLT instruction, or if the BC executes an illegal op code. The “illegal op
code” case will generate a BCTRAP interrupt, if enabled (page XX).
Message Retry Status Bits.
Bits 14-13 indicate the retry status of the most recent message the
number of times message was retried:
Bad Message.
This bit is logic 1 to indicate message format error, loopback test failure,
or no response error for the last message.
Masked Status Set.
This bit is set if one or more of the following conditions occurred during
the last message:
The table on page 27 shows how the Broadcast Command Received
(BCR) bit in the received RT Status Word affects Masked Status Set.
•
•
•
HI-6130, HI-6131
One or more of the Status Mask bits 14-9 are logic 0 in the BC
Control Word, and the corresponding bits are logic 1 in the received
RT Status Word. When BC Control Word “Reserved Bits Mask” bit
9 is logic 0, this Masked Status Set bit is set if any of the three
Reserved bits are set in the received RT Status Word.
The BCR Mask Enable bit 0 is logic 0 in the BC Configuration
Register 0x0032. Opposite logic states occur for the Mask BCR
bit in the message BC Control Word and the Broadcast Command
Received (BCR) bit in the received RT Status Word.
The BCR Mask Enable bit 0 is logic 1 in the BC Configuration
Register 0x0032. Opposite logic states prevail for the Mask BCR
bit in the message BC Control Word and the Broadcast Command
Received (BCR) bit in the received RT Status Word.
Bit 14:13
82
0-0
0-1
1-0
1-1
Number of Message Re-tries
not used
0
1
2
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