sii1161 Silicon image, sii1161 Datasheet - Page 40

• Manufacturer Part Number: sii1161
• Description: Panellink Receiver
• Manufacturer: Silicon image

The values shown in Table 20 are recommendations for noise suppression in the 1-2MHz range that should be
adjusted according to the noise characteristics of the specific board-level design. Pins in one group (such as
OVCC) may share L1 and C3, each pin having C1 and C2 placed as close to the pin as possible. This filter circuit
should be placed on planes where power supply ripple could exceed the VCC noise specification.
The PLL circuit that is powered from PVCC is more sensitive to noise in the 100-200kHz range. If the power
supply is prone to generation of noise in this range in excess of the PV
shown in Table 21 should be used on the PVCC plane.
Series Damping Resistors on Outputs
Small (~22 ohms) series resistors are effective in lowering the data-related emissions and reducing reflections.
Series resistors should be placed close to the output pins on the receiver chip, as shown in Figure 27.
SiI-DS-0096-D
Table 21. Recommended Components for 100-200kHz Noise Suppression on PVCC
100 – 300 pF
not used
Table 20. Recommended Components for 1-2MHz Noise Suppression
C1
C1
Figure 27. Receiver Output Series Damping Resistors
RX
Figure 26. Decoupling and Bypass Schematic
VCCPIN
0.1 µF
6.8 µF
C1
C2
C2
C2
36
L1
10 µF
10 µF
C3
C3
C3
CCN
VCC
specification, the component values
Ferrite, 200+ Ω
10 µH inductor
SiI 1161 PanelLink Receiver
@ 100MHz
L1
L1
Data Sheet