PCF8531U NXP [NXP Semiconductors], PCF8531U Datasheet - Page 23
PCF8531U
Manufacturer Part Number
PCF8531U
Description
34 x 128 pixel matrix driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCF8531U.pdf
(44 pages)
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NXP Semiconductors
Table 11.
[1]
PCF8531_4
Product data sheet
Instruction
H1 and H0 = don’t care (H independent command page)
NOP
Write data
Set default H[1:0]
H1 = 0 and H0 = 0 (function and RAM command page)
Instruction set
Function set
Set Y address of
RAM
Set X address of
RAM
H1 = 0 and H0 = 0 (display setting command page)
Multiplex rate
Display control
Bias system
H1 = 0 and H0 = 0 (HV-gen command page)
HV-gen control
HV-gen
configuration
Temperature control 0
Test modes
V
LCD
R/W is set to the slave address byte; Co and RS are set in the control byte.
control
Instruction set
I
command
RS
0
1
0
0
0
0
0
0
0
0
0
0
0
0
2
C-bus
Linear temperature compensation is supported in the PCF8531. The temperature
coefficient of V
Table
Fig 12. V
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
13).
[1]
LCD
I
DB7
0
D7
0
0
0
0
1
0
0
0
0
0
0
0
1
2
C-bus command byte
as a function of liquid crystal temperature
LCD
can be selected from eight values by setting bits TC[2:0] (see
DB6
0
D6
0
0
0
1
X6
0
0
0
0
0
0
1
VOP6 VOP5 VOP4 VOP3 VOP2 VOP1 VOP0
V
Rev. 04 — 13 June 2008
LCD
DB5
0
D5
0
0
1
0
X5
0
0
0
0
0
1
X
DB4
0
D4
0
0
0
0
X4
0
0
1
0
0
0
X
DB3
0
D3
0
1
0
0
X3
0
1
0
0
1
0
X
0 C
DB2
0
D2
0
0
PD
Y2
X2
1
D
BS2
1
0
TC2
X
DB1
0
D1
0
H1
V
Y1
X1
M1
IM
BS1
PRS
S1
TC1
X
mgs473
34 x 128 pixel matrix driver
T
DB0
0
D0
1
H0
0
Y0
X0
M0
E
BS0
HVE
S0
TC0
X
PCF8531
© NXP B.V. 2008. All rights reserved.
Description
no operation
write data to
display RAM
select H[1:0] = 0
select command
page
power-down
control; entry
mode
Set Y address of
RAM; 0
Set X address of
RAM; 0
Y
X
23 of 44
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