PCF8594C-2P ICST [Integrated Circuit Systems], PCF8594C-2P Datasheet - Page 10

• Manufacturer Part Number: PCF8594C-2P
• Manufacturer: ICST [Integrated Circuit Systems]

Philips Semiconductors
8.5
Read operations are initiated in the same manner as write
operations with the exception that the LSB of the slave
address is set to logic 1.
There are three basic read operations; current address
read, random read and sequential read sequential read.
1997 Feb 13
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I
2
C-bus interface
Read operations
S
Fig.8 Master reads PCF85xxC-2 slave after setting word address (write word address; read data).
SLAVE ADDRESS
Fig.9 Master reads PCF85xxC-2 immediately after first byte (read mode).
8-bit CMOS EEPROMs with
S
acknowledge
R/W
from slave
0 A
SLAVE ADDRESS
WORD ADDRESS
acknowledge
R/W
from slave
1 A
acknowledge
from slave
at this moment master
transmitter becomes
master receiver and
EEPROM slave receiver
becomes slave transmitter
A
n bytes
S
DATA
10
SLAVE ADDRESS
8.5.1
The lower 8 bits of the word address are incremented after
each transmission of a data byte (read or write). The MSB
of the word address, which is defined in the slave address,
is not changed when the word address count overflows.
Thus, the word address overflows from 255 to 0 and from
511 to 256.
auto increment
word address
acknowledge
from master
A
R
EMARK
acknowledge
R/W
from slave
last bytes
1
MBA703 - 1
DATA
A
auto increment
word address
no acknowledge
from master
PCF85xxC-2 family
n bytes
DATA
MBA704 - 1
1
last byte
auto increment
P
word address
DATA
acknowledge
from master
Product specification
auto increment
A
word address
no acknowledge
from master
1
P