DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 73
DAC1408D650C1
Manufacturer Part Number
DAC1408D650C1
Description
Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.DAC1408D650C1.pdf
(98 pages)
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NXP Semiconductors
Table 125. INTR_MISC_ENA register (address 0Fh) bit description
Default settings are shown highlighted.
Table 126. FLAG_CNT_LSB_LN0 register (address 10h) bit description
Default settings are shown highlighted.
Table 127. FLAG_CNT_MSB_LN0 register (address 11h) bit description
Default settings are shown highlighted.
Table 128. FLAG_CNT_LSB_LN1 register (address 12h) bit description
Default settings are shown highlighted.
Table 129. FLAG_CNT_MSB_LN1 register (address 13h) bit description
Default settings are shown highlighted.
Table 130. FLAG_CNT_LSB_LN2 register (address 14h) bit description
Default settings are shown highlighted.
Table 131. FLAG_CNT_MSB_LN2 register (address 15h) bit description
Default settings are shown highlighted.
Table 132. FLAG_CNT_LSB_LN3 register (address 16h) bit description
Default settings are shown highlighted.
DAC1408D650
Preliminary data sheet
Bit
7
6
5
4
3
2
1
0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Symbol
INTR_ENA_CS_INIT_LN3
INTR_ENA_CS_INIT_LN2
INTR_ENA_CS_INIT_LN1
INTR_ENA_CS_INIT_LN0
INTR_ENA_BUF_ERR_LN3
INTR_ENA_BUF_ERR_LN2
INTR_ENA_BUF_ERR_LN1
INTR_ENA_BUF_ERR_LN0
Symbol
FLAG_CNT_LN0[7:0]
Symbol
FLAG_CNT_LN0[15:8]
Symbol
FLAG_CNT_LN1[7:0]
Symbol
FLAG_CNT_LN1[15:8]
Symbol
FLAG_CNT_LN2[7:0]
Symbol
FLAG_CNT_LN2[15:8]
Symbol
FLAG_CNT_LN3[7:0]
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
All information provided in this document is subject to legal disclaimers.
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Access
R
Access
R
Access
R
Access
R
Access
R
Access
R
Access
R
Rev. 02 — 11 August 2010
Value
0
0
0
0
0
0
0
0
Value
-
Value
-
Value
-
Value
-
Value
-
Value
-
Value
-
Description
intr_misc in case cs_state_ln3 = cs_init
intr_misc in case cs_state_ln2 = cs_init
intr_misc in case cs_state_ln1 = cs_init
intr_misc in case cs_state_ln0 = cs_init
Description
lsbs of flag_counter lane 0
Description
msbs of flag_counter lane 0
Description
lsbs of flag_counter lane 1
Description
msbs of flag_counter lane 1
Description
lsbs of flag_counter lane 2
Description
msbs of flag_counter lane 2
Description
lsbs of flag_counter lane 3
intr_misc in case ila_bufcnt_ln3 out-of-range
intr_misc in case ila_bufcnt_ln2 out-of-range
intr_misc in case ila_bufcnt_ln1 out-of-range
intr_misc in case ila_bufcnt_ln0 out-of-range
DAC1408D650
© NXP B.V. 2010. All rights reserved.
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