MT48LC4M32LFB5-8IT:G Micron Semiconductor Products, MT48LC4M32LFB5-8IT:G Datasheet

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MT48LC4M32LFB5-8IT:G

Manufacturer Part Number
MT48LC4M32LFB5-8IT:G
Description
Manufacturer
Micron Semiconductor Products
Datasheet

Specifications of MT48LC4M32LFB5-8IT:G

Pack_quantity
180
Comm_code
85423231
Lead_time
56
Eccn
EAR99

Available stocks

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Manufacturer
Quantity
Price
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MT48LC4M32LFB5-8IT:G
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PEAK
Quantity:
1 000
Part Number:
MT48LC4M32LFB5-8IT:G
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micron
Quantity:
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MT48LC4M32LFB5-8IT:G
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Quantity:
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Mobile SDRAM
MT48LC8M16LF, MT48V8M16LF, MT48LC4M32LF, MT48V4M32LF
Features
• Temperature-compensated self refresh (TCSR)
• Fully synchronous; all signals registered on positive
• Internal pipelined operation; column address can be
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto precharge,
• Self refresh mode; standard and low power
• 64ms, 4,096-cycle refresh (15.6µs/row)
• LVTTL-compatible inputs and outputs
• Low voltage power supply
• Partial-array self refresh (PASR) power-saving mode
Options
• V
• Configurations
• Package/ball out
• Timing (cycle time)
• Temperature
• Design revision
Notes: 1. x16 only.
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_1.fm - Rev. L 10/07 EN
edge of system clock
changed every clock cycle
and auto refresh modes
– 3.3V/3.3V
– 2.5V/2.5–1.8V
– 8 Meg x 16 (2 Meg x 16 x 4 banks)
– 4 Meg x 32 (1 Meg x 32 x 4 banks)
– 54-ball VFBGA (8mm x 8mm)
– 54-ball VFBGA (8mm x 8mm)
– 90-ball VFBGA (8mm x 13mm)
– 90-ball VFBGA (8mm x 13mm)
– 54-pin TSOP II (400 mil)
– 54-pin TSOP II (400 mil) Pb-free
– 7.5ns @ CL = 3 (133 MHz)
– 8ns @ CL = 3 (125 MHz)
– 10ns @ CL = 3 (100 MHz)
– Commercial (0°C to +70°C)
– Industrial (–40°C to +85°C)
– Extended (–25°C to +75°C)
DD
/V
2. x32 only.
3. Contact Micron for availability.
DD
Q
Products and specifications discussed herein are subject to change by Micron without notice.
1
1
2
2
Pb-free
Pb-free
Mark
-75M
8M16
4M32
None
-10
TG
XT
LC
B4
B5
F4
F5
P
-8
IT
:G
V
3
3
3
3
3
1
Table 1:
Table 2:
Configuration
Refresh count
Row addressing
Bank addressing
Column
addressing
Speed
Grade
-75M
-75M
-10
-10
-10
-8
-8
-8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Frequency
133 MHz
125 MHz
100 MHz
100 MHz
100 MHz
83 MHz
50 MHz
40 MHz
Clock
128Mb: x16, x32 Mobile SDRAM
MT48V8M16LFB4-8:G
Configurations
Key Timing Parameters
CL = CAS (READ) latency
Part Number Example:
2 Meg x 16 x 4
4 (BA0, BA1)
4K (A0–A11)
8 Meg x 16
512 (A0–A8)
CL = 1 CL = 2 CL = 3
19ns
22ns
banks
4K
Access Time
©2001 Micron Technology, Inc. All rights reserved.
8ns
8ns
6
7ns
7ns
5.4
1 Meg x 32 x 4
4 (BA0, BA1)
4K (A0–A11)
4 Meg x 32
256 (A0–A7)
banks
t
Features
19ns 19ns
20ns 20ns
20ns 20ns
19ns 19ns
20ns 20ns
20ns 20ns
20ns 20ns
20ns 20ns
4K
RCD
t
RP

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