CA3059 Intersil, CA3059 Datasheet - Page 4

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CA3059

Manufacturer Part Number
CA3059
Description
ZERO VOLTAGE CROSSING SWITCH
Manufacturer
Intersil
Datasheet

Specifications of CA3059

Rohs Status
RoHS non-compliant

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Continuous gate current can be obtained if terminal 12 is
connected to terminal 7 to disable the zero crossing detec-
tor. In this mode, transistor Q
operation is useful when comparator operation is desired or
when inductive loads must be switched. (If the capacitance
in the load circuit is low, most RFI is eliminated.) Care must
be taken to avoid overloading of the internal power supply in
this mode. A sensitive gate thyristor should be used, and a
resistor should be placed between terminal 4 and the gate of
the thyristor to limit the current, as pointed out later under
Special Application Considerations.
Special Application Considerations
Figure 6 indicates the timing relationship between the line
voltage and the zero-voltage switch output pulses. At 60Hz,
the pulse is typically 100 s wide; at 400Hz, the pulse width
is typically 12 s. In the basic circuit shown, when the DC
logic signal is “high”, the output is disabled; when it is “low”,
the gate pulses are enabled.
FIGURE 5. CURVES SHOWING EFFECT OF EXTERNAL CA-
300
200
100
0
700
600
500
400
300
200
100
0
0
120V
0
120V
0.01
t
RMS
N1
PACITANCE ON A. THE TOTAL OUTPUT PULSE
DURATION, AND B. THE TIME FROM ZERO
CROSSING TO THE END OF THE PULSE
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09
, (NEGATIVE
RMS
, 60Hz OPERATION
t
t
N
P
0.02
, (NEGATIVE
, (POSITIVE
, 60Hz OPERATION
EXTERNAL CAPACITANCE ( F)
EXTERNAL CAPACITANCE ( F)
0.03
FIGURE 5A.
FIGURE 5B.
dv/dt
t
P1
dv/dt
0.04
dv/dt
, (POSITIVE
)
1
is always off. This mode of
)
)
0.05
dv/dt
0.06
)
0.07
Application Note 6182
0.08
0.09
0.1
4
On/Off Sensing Amplifier
The discussion thus far has considered only cases in which
pulses are present all the time or not at all. The differential
sense amplifier consisting of transistors Q
(shown in Figure 2) makes the zero-voltage switch a flexible
power control circuit. The transistor pairs Q
form a high beta composite p-n-p transistors in which the
emitters of transistors Q
composite devices. These two composite transistors are
connected as a differential amplifier with resistor R
as a constant current source. The relative current flow in the
two “collectors” is a function of the difference in voltage
between the bases of transistors Q
when terminal 13 is more positive than terminal 9, little or no
current flows in the “collector” of the transistor pair Q
When terminal 13 is negative with respect to terminal 9,
most of the current flows through that path, and none in ter-
minal 8. When current flows in the transistor pair Q
through the base emitter junction of transistor Q
through the diode D
equal to or more negative than V
the output is inhibited.
In the circuit shown in Figure 1, the voltage at terminal 9 is
derived from the supply by connection of terminals 10 and 11 to
form a precision voltage divider. This divider forms one side of a
transducer bridge, and the potentiometer R
temperature coefficient (NTC) sensor form the other side. At
FIGURE 6. TIMING RELATIONSHIP BETWEEN THE OUTPUT
LOGIC
120V
60Hz
VOLTAGE
PULSES
DC
RMS
GATE
LINE
FREQ. (Hz)
10K
5K
PULSES OF THE ZERO-VOLTAGE SWITCH AND
THE AC LINE VOLTAGE
400
60
100 F
15V
4
+
-
to terminal 7. Therefore, when V
4
and Q
T (ms)
1.25
8.3
13
8
7
t
T
5
act as the collectors of the
9
2
9
, transistor Q
ZVS
10
2
11
and Q
5
P
10K
2
2W
t ( s)
, Q
100
and the negative
12
2
-Q
4
3
3
, Q
4
1
. Therefore,
1
, and finally
and Q
is on, and
4
LOAD
, and Q
3
acting
2
2
3
13
-Q
-Q
-Q
4
4
is
5
5
.
,

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