AT88SA-ADK1 Atmel, AT88SA-ADK1 Datasheet

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... The CryptoAuthentication family uses a standard challenge response protocol to simplify programming. The system generates a random number challenge and sends it to the Atmel® AT88SA102S chip. The chip hashes that with a 256-bit key using the SHA-256 algorithm to generate a keyed 256-bit response which is sent back to the system ...

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... Fixed challenge response number pair stored in the host. In this case, the host sends its particular challenge and only an authentic AT88SA102S can generate the correct response. Since no secret is stored on the host, there is no security cost on the host. Depending on the particulars of the system, each host may have a different challenge response pair and/or each client may have the same key. • ...

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... The Atmel AT88SA102S incorporates 128 one-time fuses within the chip. Once burned, there is no way to reset the value of a fuse. Fuses, with the exception of the manufacturer ID and serial number bits initialized by Atmel have a value of one when shipped from the Atmel factory and transition to a zero when they are burned. Bits 0-63 can never be read, while bits 64-128 can always be read ...

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... Key Values The values stored in the Atmel AT88SA102S internal key array are hardwired into the masking layers of the chip during wafer manufacture. All chips have the same keys stored internally, though the value of a particular key cannot be determined externally from the chip. For this reason, customers should ensure that they program a unique (and secret) number into the 64-secret fuses and they should store the Atmel provided key values securely ...

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... These include an active shield over the entire surface of the part, internal memory encryption, internal clock generation, glitch protection, voltage tamper detection and other physical design features. Pre-programmed keys stored on the AT88SA102S are encrypted in such a way as to make retrieval of their values via outside analysis very difficult. ...

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... The waveforms are the same in either direction, however there are some differences in timing based on the expectation that the host has a very accurate and consistent clock while AT88SA102S has significant part to part variability in its internal clock generator due to normal manufacturing and environmental fluctuations. ...

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... START t t LIGNORE HIGNORE *NOTICE: Stresses beyond those listed under “Absolute +0.5V CC Atmel AT88SA102S Maximum Ratings” may cause damage to the device. This is a stress rating only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of this specification is not implied ...

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... AT88SA102S will enter sleep mode and the Wake token must be resent. µs µs Atmel AT88SA102S will initiate the first low going transition after this time interval following the end of the Transmit flag After Atmel AT88SA102S transmits the last bit of a block, system must wait this interval ...

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... IH -0.5 0 1.2 5. 0.4 OL 5.25 V MAX 4 V ESD Atmel AT88SA102S Unit Notes ° Voltage applied to Vcc pin during BurnSecure and/or BurnFuse mA nA When chip is in sleep mode Vsig = 0.0 to 0.5V or Vsig = Vcc-0. µA When chip is in sleep mode Vsig = 0.0 to 0.5V or Vsig = Vcc-0 ...

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... EXEC the chip. 4.1.2. Transmit Flag The Transmit flag is used to turn around the signal so that the Atmel system, depending on its current state. The bytes that the AT88SA102S returns to the system depend on its current state as follows: Atmel AT88SA102S 10 ® ...

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... After receipt of a command block, AT88SA102S will parse the command for errors, a process which takes t (Refer to Section 4.1.1). After this interval the system can send a Transmit token to AT88SA102S – if there was an error then AT88SA102S will respond with an error code. If there is no error then AT88SA102S internally transitions automatically from t complete ...

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... In order to speed recovery, AT88SA102S implements a timeout that forces the chip to sleep. 4.4.1. IO Timeout After a leading transition for any data token has been received, AT88SA102S will expect the remaining bits of the token to be properly received by the chip within the t transmission of an illegal token (a low pulse exceeding t t interval ...

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... Wake token. 3. There is some internal error condition within AT88SA102S which will be automatically reset after a t interval, see below. There is no way to externally reset AT88SA102S – the system should leave the IO pin idle for this interval and issue the Wake token. ...

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... If the message includes the serial number of the chip, then the response is said to be diversified. Protocols that utilize diversified responses may be more secure because two AT88SA102S chips with same key will return different responses to an identical challenge based on their unique serial number. ...

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... If Mode[4] is set, then the value of this mode bit is ignored 4 If set and Fuse[87] is burned; include the 64-secret fuses and 24-status fuses (Fuse[0] through Fuse[87]) in the message Ootherwise, the corresponding message bits are set to zero 3-0 Should be zero 8584F–SMEM–8/10 Notes SHA-256 digest Atmel AT88SA102S Meaning 15 ...

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... Table 5-1. Input Parameters Name Opcode BURNFUSE Param1 FuseNum Param2 BurnTime Data Ignored Atmel AT88SA102S 16 Size Notes 1 0x02 1 Fuse or ROM 2 Which 4-bytes within array. Bits 2-15 should Size Notes ...

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... Output Parameters Name Size Notes Success 1 Upon successful execution of HOST0, a value of 0 will be returned by the Atmel AT88SA102S The SHA-256 message body used to create the resulting digest internally stored in the chip consists of the following 512-bits: 256-bits PersonalizeKey[KeyID] 64-bits Fixed value of all ones ...

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... To facilitate secure personalization of the AT88SA102S, this map may be encrypted before being sent to the chip. If this mode is desired, then the Decrypt parameter should be set to one in the input parameter list. The decryption (transport) key is computed by the GenPersonalizationKey command, which must have been run immediately prior to the execution of BurnSecure. In this case, prior to burning any fuses, the input Map parameter is XOR’ ...

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... The Selector parameter provides a mechanism to select which device will pause if there are multiple devices on the bus: If the Selector parameter is 0x00, then every AT88SA102S chip receiving this command will go into the pause state and no chip will return a success code. If any of the bits of the Selector parameter are set, then the chip will read the values of Fuse[84-87] and go into the pause state only if those fuse values match the least significant 4-bits of the Selector parameter ...

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... These dimensions apply to the flat section of the lead between 0.08 mm and 0.15mm from the lead tip. This drawing is for general information only. Refer to JEDEC Drawing TO-236, Variation AB for additional information. Package Drawing Contact: packagedrawings@atmel.com R Atmel AT88SA102S 20 3 GND E1 E SDA V ...

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... Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and determined at Datum Plane H. Package Drawing Contact: packagedrawings@atmel.com 8584F–SMEM–8/ TITLE 8A2, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) Atmel AT88SA102S L1 L End View COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL D 2.90 3 ...

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... SOIC Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. Package Drawing Contact: packagedrawings@atmel.com Atmel AT88SA102S 22 SYMBOL TITLE 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) ...

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... Update IO Timeout description Update to Table 3: AC Parameters Expansion of IO Timeout specification Added 8ld TSSOP Updated parameter tables and added 8ld SOIC Initial document release Atmel AT88SA102S Operating Range Green compliant (exceeds RoHS)/Industrial (−40°C to 85°C) Green compliant (exceeds RoHS)/Industrial (− ...

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