clc520 National Semiconductor Corporation, clc520 Datasheet
clc520
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clc520 Summary of contents
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... For example, a CLC520 may be set for a maximum gain of 2 (or 6dB) for a voltage controlled gain range from 40dB to less than 34dB. Alternatively, the CLC520 could be set for a maximum gain of 100 or (40dB) for a voltage controlled gain range from 40dB to less than 0dB. ...
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... Ordering Information Package 14-pin plastic DIP 14-pin plastic SOIC www.national.com Temperature Range Part Number Industrial −40˚C to +85˚C CLC520AJP −40˚C to +85˚C CLC520AJE 2 Package NSC Marking Drawing CLC520AJP N14A CLC520AJE M14A ...
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... Lead Solder Duration (+300˚C) ± 7V ESD (human body model) Operating Ratings Thermal Resistance 60mA Package ± V MDIP CC 10V SOIC ± ± 182 , V = +2V; unless specified Conditions CLC520AJ < V 0.5V OUT PP < V 0.5V (AJE only) OUT PP < V 4.0V OUT PP < V 0.5V OUT +0.2V +1VDC IN g < ...
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Electrical Characteristics ± +10 5V 100 , Symbol Parameter IB Input Bias Current (Note 5) DIB Average Temperature Doefficient IOS Input Offset Current DIOS Average Temperature Coefficient PSS Power Supply ...
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Typical Performance Characteristics ± 25˚ +10 5V 182 , V = +2V Frequency Response, A VMAX Frequency Response, A VMAX Small Signal Gain vs. ...
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Typical Performance Characteristics = 182 , V = +2V) (Continued) g 3rd Harmonic Distortion Gain vs. V Large and Small Signal Pulse Response www.national.com (T = 25˚ 2nd and 3rd Harmonic Distortion vs. V 01275602 g 01275640 01275642 ...
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Typical Performance Characteristics = 182 , V = +2V) (Continued) g Settling Time 1.2V g Settling Time vs. Capacitive Load, A Gain Control Channel Feedthrough (T = 25˚ +10 Long-Term Settling Time 01275614 ...
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Typical Performance Characteristics = 182 , V = +2V) (Continued) g Differential Gain and Phase Output Noise vs. V Linearity 0.75V to 1.4V g www.national.com (T = 25˚ +10 01275643 g 01275622 01275645 ...
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... Application Information FIGURE 1. CLC520 Simplified Schematic Simplified Circuit Description A simplified schematic for the CLC520 is given in Figure and −V are buffered with closed-loop voltage follow ers inducing a signal current in R (+V )−(−V ), the differential input voltage. This current con trols a current source which supplies two well matched tran- sistors, Q1 and Q2 ...
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... If the maximum input amplitude exceeds the above V then CLC520 should either be moved to a location in the signal chain where input amplitudes are reduced, or the CLC520 gain A should be reduced or the values for R VMAX and R should be increased ...
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... FIGURE 8. Automatic Gain Control (AGC) Loop , The AGC circuits io Figure 8 shows a typical AGC circuit. The CLC520 is fol- lowed up with a CLC401 for higher overall gain. The output of the CLC401 is rectified and fed to an inverting integrator using a CLC420 (wideband voltage feedback op amp). When the output voltage, V output voltage ramps down reducing the net gain of the /2 ...
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Physical Dimensions unless otherwise noted www.national.com inches (millimeters) 14-Pin MDIP NS Package Number N14A 14-Pin SOIC NS Package Number M14A 12 ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...