ISL6443 Intersil Corporation, ISL6443 Datasheet
ISL6443
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ISL6443 Summary of contents
Page 1
... Data Sheet 300kHz Dual, 180° Out-of-Phase, Step- Down PWM and Single Linear Controller The ISL6443 is a high-performance, triple-output controller optimized for converting wall adapter, battery or network intermediate bus DC input supplies into the system supply voltages required for a wide variety of applications. Each output is adjustable down to 0.8V. The two PWMs are synchronized 180° ...
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... Pinouts ISL6443 (QFN) TOP VIEW PHASE2 1 ISEN2 2 PGOOD 3 VCC_5V 4 SD2 5 SS2 6 7 OCSET2 ISL6443 23 22 ISEN1 21 PGND 20 19 SD1 18 SS1 SGND 17 16 OCSET1 15 FB1 13 14 FN9044.2 August 9, 2006 ...
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Block Diagram BOOT1 UGATE1 PHASE1 ADAPTIVE DEAD-TIME DIODE EMULATION VCC_5V V/I SAMPLE TIMING LGATE1 PGND 0.8V REFERENCE + GATE3 + FB3 18.5pF 1400kΩ 180kΩ FB1 - 16kΩ 0.8V ERROR AMP 1 ...
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... VIN VCC_5V SS1 SS2 0.1µF BOOT1 BOOT2 24 27 UGATE1 UGATE2 23 28 PHASE2 PHASE1 ISEN2 R4 ISEN1 21 2 1.4K ISL6443 LGATE1 LGATE2 25 26 (See Note) PGND FB2 20 8 FB1 SGND 15 9 SGND 14 SD1 19 GATE3 13 SD2 FB3 5 12 OCSET1 OCSET2 ...
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... SYNC Input Minimum Pulse Width (Note 7) SYNC Output HIGH Level SHUTDOWN1/SHUTDOWN2 HIGH Level (Converter Enabled) LOW Level (Converter Disabled) 5 ISL6443 Thermal Information Thermal Resistance (Typical) 28 Lead QFN (Note Maximum Junction Temperature (Plastic Package) . -55°C to 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . -40° ...
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... PGOOD Lower Threshold, PWM 1 and 2 PGOOD for Linear Controller ISEN and CURRENT LIMIT Full Scale Input Current (Note 9) Overcurrent Threshold (Note 9) OCSET (Current Limit) Voltage SOFT-START Soft-Start Current 6 ISL6443 = 5.6V to 24V, or VCC_5V = 5V ±10 25°C (Continued) A TEST CONDITIONS C = 1000pF 25°C OUT A VCC_5V = 4 ...
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... Guaranteed by design; not production tested. 8. Not production tested; guaranteed by characterization only. 9. Guaranteed by design. The full scale current of 32µA is recommended for optimum current sample and hold operation. See the Feedback Loop Compensation Section below. 7 ISL6443 = 5.6V to 24V, or VCC_5V = 5V ±10 25°C (Continued) A ...
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... Typical Performance Curves (Oscilloscope Plots are Taken Using the ISL6443EVAL Evaluation Board, VIN = 12V Unless Otherwise Noted.) 3.4 3.39 3.38 3.37 3.36 3.35 3.34 3.33 3.32 3.31 3.3 0 0.5 1 1.5 2 2.5 LOAD CURRENT (A) FIGURE 1. PWM1 LOAD REGULATION 0.85 0.84 0.83 0.82 0.81 0.8 0.79 0.78 0.77 0.76 0.75 -40 - TEMPERATURE (°C) FIGURE 3. REFERENCE VOLTAGE VARIATION OVER TEMPERATURE V 20mV/DIV, AC COUPLED OUT1 I 0.5A/DIV, AC COUPLED L1 PHASE1 10V/DIV FIGURE 5 ...
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... Typical Performance Curves (Oscilloscope Plots are Taken Using the ISL6443EVAL Evaluation Board, VIN = 12V Unless Otherwise Noted.) V 200mV/DIV OUT1 AC COUPLED I 1A/DIV OUT1 FIGURE 7. LOAD TRANSIENT RESPONSE VOUT1 (3.3V) VCC_5V 1V/DIV V 1V/DIV OUT1 FIGURE 9. PWM SOFT-START WAVEFORM 100 LOAD CURRENT (A) FIGURE 11 ...
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... SYNC - This pin may be used to synchronize two or more ISL6443 controllers. This pin requires a 1K resistor to ground if used; connect directly to VCC_5V if not used. SS1, SS2 - These pins provide a soft-start function for their respective PWM controllers. When the chip is enabled, the regulated 5µ ...
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... Bypass the regulator’s output (VCC_5V) with a 4.7µF capacitor to ground. The dropout voltage for this LDO is typically 600mV, so when VCC_5V is greater than 5.6V, VCC_5V is typically 5V. The ISL6443 also employs an undervoltage lockout circuit that disables both regulators when VCC_5V falls below 4.4V. ...
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... Out-of-Phase Operation The two PWM controllers in the ISL6443 operate 180 phase to reduce input ripple current. This reduces the input capacitor ripple current requirements, reduces power supply- induced noise, and improves EMI. This effectively helps to lower component cost, save board space and reduce EMI. ...
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... VCC_5V if not used. Figure 16 shows the SYNC pin waveform operating at 16 times the switching frequency. FIGURE 16. SYNC WAVEFORM 13 ISL6443 Feedback Loop Compensation To reduce the number of external components and to simplify the process of determining compensation components, both PWM controllers have internally compensated error amplifiers ...
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... Under no-load conditions, leakage currents from the pass transistors supply the output capacitors, even when the transistor is off. Generally this is not a problem since the 14 ISL6443 feedback resistor drains the excess charge. However, charge may build up on the output capacitor making V C2 rise above its set point ...
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... Layout Guidelines Careful attention to layout requirements is necessary for successful implementation of a ISL6443 based DC/DC converter. The ISL6443 switches at a very high frequency and therefore the switching times are very short. At these switching frequencies, even the shortest trace has significant impedance. Also the peak gate drive current rises significantly in extremely short time ...
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... One of the parameters limiting the converter’s response to a load transient is the time required for the inductor current to slew to it’s new level. The ISL6443 will provide either 0% or 71% duty cycle in response to a load transient. The response time is the time interval required to slew the inductor current from an initial current value to the load current level ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 17 ISL6443 5 4 PHASE 3 ...
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... CORNER REF. OPTION 4X BOTTOM VIEW SECTION "C-C" TERMINAL TIP FOR ODD TERMINAL/SIDE FOR EVEN TERMINAL/SIDE 18 ISL6443 L28.5x5 28 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220VHHD-1 ISSUE SYMBOL 0. ...