LT1640 Linear Technology, LT1640 Datasheet
LT1640
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LT1640 Summary of contents
Page 1
... The PWRGD (LTC1640L) or PWRGD (LTC1640H) signal can be used to directly enable a power module. The LT1640L is designed for modules with a low enable input and the LT1640H for modules with a high enable input. The LT1640L/LT1640H is available in 8-pin PDIP and SO packages ...
Page 2
... OVHY I OV Pin Input Current INOV 2 U RATINGS (Note 1), All Voltages Referred to V Operating Temperature Range LT1640LC/LT1640HC ............................. LT1640LI/LT1640HI .......................... – Storage Temperature Range ................ – 150 C Lead Temperature (Soldering, 10 sec)................. 300 ORDER PART NUMBER LT1640LCN8 PWRGD 1 LT1640LCS8 ...
Page 3
... Figures 1, 2 Figures 1, 3 Figures 1, 4 (LT1640L) Figures 1, 5 (LT1640H) Figures 1, 5 (LT1640L) Figures 1, 5 (LT1640H) Figures 1, 5 Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to V specified. Supply Current vs Temperature 1.6 1 ...
Page 4
... PWRGD/PWRGD (Pin 1): Power Good Output Pin. This pin will toggle when V is within V DRAIN be connected directly to the enable pin of a power module. When the DRAIN pin of the LT1640L is above V than V , the PWRGD pin will be high impedance, allowing PG the pull-up current of the module’s enable pin to pull the pin high and turn the module off ...
Page 5
... The input supply voltage ranges from 10V to 80V AND CC REFERENCE GENERATOR LOGIC AND GATE DRIVE 50mV + – – SENSE GATE EE LT1640L/LT1640H and SENSE can be shorted together. EE – < 50mV. The GATE pin is pulled SENSE REF OUTPUT PWRGD/PWRGD DRIVE + – – ...
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... Figure GATE Timing 2V 1.223V PHLUV GATE 1V Figure GATE Timing PWRGD/PWRGD DRAIN LT1640L/LT1460H UV GATE SENSE EE V 1640 F01 Figure 1. Test Circuit 1.203V SENSE t PLHOV GATE 1V 1640 F02 1.243V DRAIN t PLHUV PWRGD 1V 1640 F03 ...
Page 7
... Without C1 and R3, capacitor C2 would pull the gate voltage roughly equal to V LT1640 could power up and actively pull the gate low. By placing capacitor C1 parallel with the gate capacitance of Q1 and isolating them from C2 using resistor R3 the problem is solved. The value of C1 should be 10 times the value of C and R3 • ...
Page 8
... DRAIN voltage has finished ramping, the GATE pin then ramps to its final value. Electronic Circuit Breaker The LT1640 features an electronic circuit breaker function that protects against short circuits or excessive supply currents. By placing a sense resistor between the V SENSE pin, the circuit breaker will be tripped whenever the voltage across the sense resistor is greater than 50mV for more than shown in Figure 7 ...
Page 9
... Under some conditions, a short circuit at the output can cause the input supply to dip below the UV threshold, resetting the circuit breaker immediately. The LT1640 then cycles on and off repeatedly until the short is removed. This can be minimized by adding a deglitching delay to the UV pin with a capacitor from ...
Page 10
... The LT1640L has a PWRGD output for 1 • • modules with an active low enable input, and the LT1640H GATE R 3 has a PWRGD output for modules with an active high enable input. = GATE When the DRAIN voltage of the LT1640H is high with ...
Page 11
... Q1 Figure 11. Active High Enable Module pull-up current in the module then flows through R7, pulling the PWRGD pin high and enabling the module. When the DRAIN voltage of the LT1640L is high with respect the internal pull-down transistor Q2 is off EE and the PWRGD pin high impedance state (Figure 12). The PWRGD pin will be pulled high by the module’ ...
Page 12
... Many applications place an EMI filter module in the power path to prevent switching noise of the module from being injected back onto the power supply. A typical application GND 562k V PWRGD DRAIN C2 R5 LT1640L 9.09k 3.3nF 2 6 100V 1% OV GATE R6 V SENSE EE 10k ...