mm74hc574 Fairchild Semiconductor, mm74hc574 Datasheet

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mm74hc574

Manufacturer Part Number
mm74hc574
Description
3-state Octal D-type Edge-triggered Flip-flop
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2005 Fairchild Semiconductor Corporation
MM74HC574WM
MM74HC574SJ
MM74HC574MTC
MM74HC574N
MM74HC574
3-STATE Octal D-Type Edge-Triggered Flip-Flop
General Description
The MM74HC574 high speed octal D-type flip-flops utilize
advanced silicon-gate P-well CMOS technology. They pos-
sess the high noise immunity and low power consumption
of standard CMOS integrated circuits, as well as the ability
to drive 15 LS-TTL loads. Due to the large output drive
capability and the 3-STATE feature, these devices are ide-
ally suited for interfacing with bus lines in a bus organized
system.
These devices are positive edge triggered flip-flops. Data
at the D inputs, meeting the set-up and hold time require-
ments, are transferred to the Q outputs on positive going
transitions of the CLOCK (CK) input. When a high logic
level is applied to the OUTPUT CONTROL (OC) input, all
outputs go to a high impedance state, regardless of what
signals are present at the other inputs and the state of the
storage elements.
The 74HC logic family is speed, function, and pinout com-
patible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
Pin Assignments for DIP, SOIC, SOP and TSSOP
CC
Package Number
and ground.
MTC20
Top View
M20D
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS005213
Features
Truth Table
H
L
X
n
Z
Q
established
0
Typical propagation delay: 18 ns
Wide operating voltage range: 2V–6V
Low input current: 1
Low quiescent current: 80
Compatible with bus-oriented systems
Output drive capability: 15 LS-TTL loads
LOW Level
Transition from LOW-to-HIGH
Don't Care
High Impedance State
HIGH Level
The level of the output before steady state input conditions were
Package Description
Control
Output
H
L
L
L
P
Clock
A maximum
X
n
n
L
P
A maximum
September 1983
Revised May 2005
Data
H
X
X
L
www.fairchildsemi.com
Output
Q
H
Z
L
0

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mm74hc574 Summary of contents

Page 1

... MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They pos- sess the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive ...

Page 2

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) ...

Page 3

AC Electrical Characteristics q 5V Symbol Parameter f Maximum Operating Frequency MAX Maximum Propagation Delay, Clock to Q PHL PLH Maximum Output ...

Page 4

AC Electrical Characteristics Symbol Parameter Conditions C Maximum Output OUT Capacitance Note 5: C determines the no load dynamic power consumption www.fairchildsemi.com (Continued ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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