nb100lvep221 ON Semiconductor, nb100lvep221 Datasheet

no-image

nb100lvep221

Manufacturer Part Number
nb100lvep221
Description
2.5v/3.3v 1 20 Differential Hstl/ecl/pecl Clock Driver
Manufacturer
ON Semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
nb100lvep221FAG
Manufacturer:
ON Semiconductor
Quantity:
133
Part Number:
nb100lvep221FAG
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
nb100lvep221FAR2
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
nb100lvep221FARG
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
nb100lvep221MNG
Manufacturer:
ON Semiconductor
Quantity:
230
Part Number:
nb100lvep221MNG
Manufacturer:
ON/安森美
Quantity:
20 000
Part Number:
nb100lvep221MNRG
Manufacturer:
ON/安森美
Quantity:
20 000
NB100LVEP221
2.5V/3.3V 1:20 Differential
HSTL/ECL/PECL Clock Driver
Description
driver, designed with clock distribution in mind, accepting two clock
sources into an input multiplexer. The two clock inputs are differential
ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The
LVPECL input signals can be either differential configuration or
single-ended (if the V
Optimal design, layout, and processing minimize skew within a device
and from device to device.
terminated identically into 50 W even if only one output is being used.
If an output pair is unused, both outputs may be left open
(unterminated) without affecting skew.
operated from a positive V
LVEP221 to be used for high performance clock distribution in +3.3 V or
+2.5 V systems. In a PECL environment, series or Thevenin line
terminations are typically used as they require no additional power
supplies. For more information on PECL terminations, designers should
refer to Application Note AND8020/D.
device only. For single- ended LVPECL input conditions, the unused
differential input is connected to V
V
V
0.5 mA. When not used, V
LVPECL mode, or V
Features
*For additional information on our Pb-Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2007
June, 2007 - Rev. 8
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
BB
CC
The NB100LVEP221 is a low skew 1-to-20 differential clock
The LVEP221 specifically guarantees low output-to-output skew.
To ensure tightest skew, both sides of differential outputs should be
The NB100LVEP221, as with most other ECL devices, can be
The V
Single- ended CLK input operation is limited to a V
V
V
15 ps Typical Output-to-Output Skew
40 ps Typical Device-to- Device Skew
Jitter Less than 2 ps RMS
Maximum Frequency > 1.0 GHz Typical
Thermally Enhanced 52-Lead LQFP and QFN
V
540 ps Typical Propagation Delay
LVPECL and HSTL Mode Operating Range:
NECL Mode Operating Range:
Q Output will Default Low with Inputs Open or at V
Pin Compatible with Motorola MC100EP221
Pb-Free Packages are Available*
CC
CC
BB
may also rebias AC coupled inputs. When used, decouple V
via a 0.01 mF capacitor and limit current sourcing or sinking to
Output
= 2.375 V to 3.8 V with V
= 0 V with V
BB
pin, an internally generated voltage supply, is available to this
EE
EE
BB
≤ -3.0 V in NECL mode.
= -2.375 V to -3.8 V
output is used).
CC
BB
should be left open.
supply in LVPECL mode. This allows the
BB
EE
= 0 V
as a switching reference voltage.
CC
EE
≥ 3.0 V in
1
BB
and
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
*For additional marking information, refer to
Application Note AND8002/D.
CASE 485M
CASE 848H
MN SUFFIX
FA SUFFIX
LQFP-52
QFN-52
A
WL
YY
WW
G
ORDERING INFORMATION
1
52
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
Publication Order Number:
1
1
52
NB100LVEP221/D
52
DIAGRAM*
AWLYYWWG
MARKING
AWLYYWWG
LVEP221
LVEP221
NB100
NB100

Related parts for nb100lvep221

nb100lvep221 Summary of contents

Page 1

... To ensure tightest skew, both sides of differential outputs should be terminated identically into 50 W even if only one output is being used output pair is unused, both outputs may be left open (unterminated) without affecting skew. The NB100LVEP221, as with most other ECL devices, can be operated from a positive V supply in LVPECL mode. This allows the CC LVEP221 to be used for high performance clock distribution in +3 ...

Page 2

... EE conductive exposed pad on package bottom (see package case drawing) must be attached to a heat-sinking conduit, capable of transferring 1.2 Watts. This exposed pad is electrically connected to V NB100LVEP221 NB100LVEP221 internally. EE Figure 1. 52-Lead LQFP Pinout (Top View) http://onsemi.com ...

Page 3

... The thermally conductive exposed pad on the bottom of the package is electrically connected Table 2. FUNCTION TABLE CLK_SEL Active Input L CLK0, CLK0 H CLK1, CLK1 NB100LVEP221 NB100LVEP221 Figure 2. 52-Lead QFN Pinout (Top View) CLK0 CLK0 CLK1 CLK1 CLK_SEL internally. Figure 3. Logic Diagram http://onsemi.com 3 ...

Page 4

... Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. NB100LVEP221 Characteristics Human Body Model Machine Model ...

Page 5

... Input and output parameters vary 1:1 with V 7. All outputs loaded with 2 Single-ended input operation is limited min varies 1:1 with IHCMR EE IHCMR input signal. NB100LVEP221 (Note -40 °C Min Typ Max 100 125 150 ...

Page 6

... Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. NB100LVEP221 ...

Page 7

... Measured with 750 mV source (LVPECL (HSTL) source, 50% duty cycle clock source. All outputs loaded with 15. Skew is measured between outputs under identical transitions and conditions on any one device. 16. Device-to-Device skew for identical transitions, outputs and V 17 the differential configuration input voltage swing required to maintain AC characteristics. PP NB100LVEP221 = -2.375 to -3 2.375 to 3 -40 ° ...

Page 8

... Figure 4. Output Voltage ( IHCMR PP Figure 5. LVPECL Differential Input Levels Q Driver Device Q Figure 7. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.) NB100LVEP221 0.2 0.4 0 INPUT FREQUENCY (GHz) IN )/Jitter versus Input Frequency (V OPP V (LVPECL (DIFF) ...

Page 9

... NB100LVEP221. The size of the land pattern can be larger, smaller, or even take on a different shape than the exposed pad on the package. However, the solderable area should be at least the same size and shape as the exposed pad on the package. Direct soldering of the exposed pad to the thermal land will provide an efficient thermal conduit ...

Page 10

... ORDERING INFORMATION Device NB100LVEP221FA NB100LVEP221FAG NB100LVEP221FAR2 NB100LVEP221FARG NB100LVEP221MNG NB100LVEP221MNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D ...

Page 11

... SEATING PLANE 0.08 (0.003 EXPOSED PAD VIEW AG-AG NB100LVEP221 PACKAGE DIMENSIONS LQFP 52 LEAD EXPOSED PAD PACKAGE CASE 848H-01 ISSUE 0.20 (0.008 PLATING AA -Y- É É É É B É É É É Ç Ç Ç Ç ...

Page 12

... BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A2 0.60 0.80 A3 0.20 REF b 0.18 0.30 D 8.00 BSC D2 6.50 6.80 E 8.00 BSC E2 6.50 6.80 e 0.50 BSC K 0.20 --- L 0.30 0.50 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB100LVEP221/D ...

Related keywords