PIC18F24J50-I/SO Microchip Technology, PIC18F24J50-I/SO Datasheet - Page 210
PIC18F24J50-I/SO
Manufacturer Part Number
PIC18F24J50-I/SO
Description
IC PIC MCU FLASH 16K 2V 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
4.PIC18F24J50-ISS.pdf
(18 pages)
5.PIC18F26K20-ISO.pdf
(430 pages)
Specifications of PIC18F24J50-I/SO
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, MA180024, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18LF24J50-ISS PDF datasheet #2
- PIC18LF24J50-ISS PDF datasheet #3
- PIC18F24J50-ISS PDF datasheet #4
- PIC18F26K20-ISO PDF datasheet #5
- Current page: 210 of 554
- Download datasheet (9Mb)
PIC18F46J50 FAMILY
14.2
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
• Timer with Gated Control
FIGURE 14-1:
DS39931C-page 210
T3G
From Timer0
Overflow
From Timer2
Match PR2
Note 1:
T3GSS<1:0>
Timer3 Operation
2:
3:
4:
T3GPOL
ST Buffer is high-speed type when using T3CKI.
Timer3 register increments on rising edge.
Synchronize does not operate while in Sleep.
If T3OSCEN = 1, clock is from Timer1 crystal output. If T3OSCEN = 0, clock is from T3CKI digital input
pin assigned in the PPS module.
Set flag bit
TMR1IF on
Overflow
TIMER3 BLOCK DIAGRAM
00
10
01
TMR3ON
T3GTM
TMR3H
TMR3
T3G_IN
(2)
D
R
CK
TMR3L
Q
Q
TMR3CS<1:0>
T3CKI
0
1
T1OSC
T3GGO/T3DONE
Q
Internal
Internal
F
OSC
Clock
Clock
F
(1)
OSC
EN
(4)
or
/4
D
external clock from the T3CKI pin (on the rising edge
The operating mode is determined by the clock select
bits, TMR3CSx (T3CON<7:6>). When the TMR3CSx bits
are cleared (= 00), Timer3 increments on every internal
instruction cycle (F
Timer3 clock source is the system clock (F
when it is ‘10’, Timer3 works as a counter from the
after the first falling edge) or the Timer1 oscillator.
Single Pulse
Acq. Control
10
01
00
T3CLK
T3GSPM
T3CKPS<1:0>
T3SYNC
Prescaler
1, 2, 4, 8
TMR3ON
0
1
2
0
1
Internal
OSC
F
Clock
OSC
T3GVAL
TMR3GE
/4). When TMR3CSx = 01, the
/2
© 2009 Microchip Technology Inc.
Q1
Synchronized
Synchronize
Interrupt
Clock Input
D
EN
det
det
Sleep Input
Q
(3)
Set
TMR3GIF
T3GCON
Data Bus
OSC
RD
), and
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