PIC16F873A-I/SS Microchip Technology, PIC16F873A-I/SS Datasheet - Page 331

• Manufacturer Part Number: PIC16F873A-I/SS
• Description: IC MCU FLASH 4KX14 EE 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F873A-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 22
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Core: PIC
• Processor Series: PIC16F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Data Ram Size: 192 B
• Data Rom Size: 128 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 5
• Height: 1.75 mm
• Interface Type: I2C, SPI, USART
• Length: 10.2 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4 V
• Width: 5.3 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164307 - MODULE SKT FOR PM3 28SSOPAC164020 - MODULE SKT PROMATEII 44TQFPXLT28SS-1 - SOCKET TRANSITION ICE 28SSOP
• Lead Free Status / Rohs Status: Details
• Other names: PIC16F873AI/SS

17.4.18.3 Bus Collision During a STOP Condition
1997 Microchip Technology Inc.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
SDA
PEN
SCL
P
Bus collision occurs during a STOP condition if:
a)
b)
The STOP condition begins with SDA asserted low. When SDA is sampled low, the SCL pin is
allow to float. When the pin is sampled high (clock arbitration), the baud rate generator is loaded
with SSPADD<6:0> and counts down to 0. After the BRG times out SDA is sampled. If SDA is
sampled low, a bus collision has occurred. This is due to another master attempting to drive a
data '0'
collision occurs. This is another case of another master attempting to drive a data '0'
(Figure
Figure 17-40: Bus Collision During a STOP Condition (Case 1)
Figure 17-41: Bus Collision During a STOP Condition (Case 2)
After the SDA pin has been de-asserted and allowed to float high, SDA is sampled low
after the BRG has timed out.
After the SCL pin is de-asserted, SCL is sampled low before SDA goes high.
(Figure
17-41).
Assert SDA
T
SDA asserted low
BRG
17-40). If the SCL pin is sampled low before SDA is allowed to float high, a bus
T
BRG
Preliminary
T
BRG
T
BRG
Section 17. MSSP
SCL goes low before SDA goes high
Set BCLIF
T
BRG
T
BRG
DS31017A-page 17-55
'0'
'0'
SDA sampled
low after T
Set BCLIF
'0'
'0'
BRG
,
17