PIC24FJ256GA106-I/PT Microchip Technology, PIC24FJ256GA106-I/PT Datasheet - Page 155
![IC PIC MCU FLASH 256K 64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC24FJ256GA106-I/PT
Manufacturer Part Number
PIC24FJ256GA106-I/PT
Description
IC PIC MCU FLASH 256K 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ128GA008-IPT.pdf
(12 pages)
2.PIC24FJ128GA106-IPT.pdf
(14 pages)
3.PIC24FJ128GA106-IPT.pdf
(330 pages)
4.PIC24FJ128GA106-IPT.pdf
(52 pages)
5.PIC24FJ256GA106-IPT.pdf
(59 pages)
6.PIC24FJ128GB110-IPF.pdf
(292 pages)
Specifications of PIC24FJ256GA106-I/PT
Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARDMA240015 - BOARD MCV PIM FOR 24F256GADM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GA106-I/PT
Manufacturer:
AD
Quantity:
201
Company:
Part Number:
PIC24FJ256GA106-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
13.0
Devices in the PIC24FJ256GA110 family all feature 9
independent enhanced output compare modules. Each
of these modules offers a wide range of configuration
and operating options for generating pulse trains on
internal device events, and can produce pulse-width
modulated waveforms for driving power applications.
Key features of the enhanced output compare module
include:
• Hardware-configurable for 32-bit operation in all
• Synchronous and Trigger modes of output
• Two separate period registers (a main register,
• Configurable for single-pulse or continuous pulse
• Up to 6 clock sources available for each module,
13.1
13.1.1
By default, the enhanced output compare module oper-
ates in a free-running mode. The internal, 16-bit
counter, OCxTMR, counts up continuously, wrapping
around from FFFFh to 0000h on each overflow, with its
period synchronized to the selected external clock
source. Compare or PWM events are generated each
time a match between the internal counter and one of
the period registers occurs.
© 2008 Microchip Technology Inc.
Note:
modes by cascading two adjacent modules
compare operation, with up to 30 user-selectable
trigger/sync sources available
OCxR, and a secondary register, OCxRS) for
greater flexibility in generating pulses of varying
widths
generation on an output event, or continuous
PWM waveform generation
driving a separate internal 16-bit counter
OUTPUT COMPARE WITH
DEDICATED TIMER
General Operating Modes
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”.
SYNCHRONOUS AND TRIGGER
MODES
PIC24FJ256GA110 FAMILY
Preliminary
In Synchronous mode, the module begins performing
its compare or PWM operation as soon as its selected
clock source is enabled. Whenever an event occurs on
the selected sync source, the module’s internal counter
is reset. In Trigger mode, the module waits for a sync
event from another internal module to occur before
allowing the counter to run.
Free-running mode is selected by default, or any time
that the SYNCSEL bits (OCxCON2<4:0>) are set to
‘00000’. Synchronous or Trigger modes are selected
any time the SYNCSEL bits are set to any value except
‘00000’. The OCTRIG bit (OCxCON2<7>) selects
either Synchronous or Trigger mode; setting the bit
selects Trigger mode operation. In both modes, the
SYNCSEL bits determine the sync/trigger source.
13.1.2
By default, each module operates independently with
its own set of 16-bit timer and duty cycle registers. To
increase resolution, adjacent even and odd modules
can be configured to function as a single 32-bit module.
(For example, modules 1 and 2 are paired, as are mod-
ules 3 and 4, and so on.) The odd-numbered module
(OCx) provides the Least Significant 16 bits of the
32-bit register pairs, and the even module (OCy)
provides the Most Significant 16 bits. Wraparounds of
the OCx registers cause an increment of their
corresponding OCy registers.
Cascaded operation is configured in hardware by
setting the OC32 bits (OCxCON2<8>) for both
modules.
CASCADED (32-BIT) MODE
DS39905B-page 153