DSPIC30F4011-30I/ML Microchip Technology, DSPIC30F4011-30I/ML Datasheet - Page 208
![IC DSPIC MCU/DSP 48K 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F4011-30I/ML
Manufacturer Part Number
DSPIC30F4011-30I/ML
Description
IC DSPIC MCU/DSP 48K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
Specifications of DSPIC30F4011-30I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F401130IML
- DSPIC30F4012-30ISO PDF datasheet
- DSPIC30F4012-30ISO PDF datasheet #2
- DSPIC30F4012-30ISO PDF datasheet #3
- DSPIC30F4012-30ISO PDF datasheet #4
- DSPIC30F4012-30ISO PDF datasheet #5
- Current page: 208 of 238
- Download datasheet (4Mb)
dsPIC30F4011/4012
TABLE 24-35: SPI MODULE SLAVE MODE (CKE = 1) TIMING REQUIREMENTS
DS70135G-page 208
AC CHARACTERISTICS
SP70
SP71
SP72
SP73
SP30
SP31
SP35
SP40
SP41
SP50
SP51
SP52
SP60
Note 1:
Param
No.
2:
3:
4:
TscL
TscH
TscF
TscR
TdoF
TdoR
TscH2doV,
TscL2doV
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TssL2scH,
TssL2scL
TssH2doZ SS1↑ to SDO1 Output
TscH2ssH
TscL2ssH
TssL2doV SDO1 Data Output Valid after
Symbol
These parameters are characterized but not tested in manufacturing.
Data in “Typ” column is at 5V, 25°C unless otherwise stated. Parameters are for design guidance only and
are not tested.
The minimum clock period for SCK1 is 100 ns. Therefore, the clock generated in Master mode must not
violate this specification.
Assumes 50 pF load on all SPI pins.
SCK1 Input Low Time
SCK1 Input High Time
SCK1 Input Fall Time
SCK1 Input Rise Time
SDO1 Data Output Fall Time
SDO1 Data Output Rise Time
SDO1 Data Output Valid after
SCK1 Edge
Setup Time of SDI1 Data Input
to SCK1 Edge
Hold Time of SDI1 Data Input
to SCK1 Edge
SS1↓ to SCK1↓ or SCK1↑ Input
High-Impedance
SS1 Edge
SS1↑ after SCK1 Edge
Characteristic
(4)
(3)
(3)
(1)
(3)
(3)
1.5 T
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
Min
120
CY
30
30
20
20
10
—
—
—
—
—
—
+ 40
Typ
10
10
—
—
—
—
—
—
—
—
—
—
—
(2)
-40°C ≤ T
-40°C ≤ T
Max
25
25
30
50
50
—
—
—
—
—
—
—
—
© 2010 Microchip Technology Inc.
A
A
Units
≤ +85°C for Industrial
≤ +125°C for Extended
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
See parameter
See parameter
Conditions
DO32
DO31
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