PIC18LF452-I/L Microchip Technology, PIC18LF452-I/L Datasheet - Page 77
![IC MCU FLASH 16KX16 A/D 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC18LF452-I/L
Manufacturer Part Number
PIC18LF452-I/L
Description
IC MCU FLASH 16KX16 A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18LF452-I/L
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
1 x 16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Package
44PLCC
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF452-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 77 of 332
- Download datasheet (6Mb)
8.1
The INTCON Registers are readable and writable reg-
isters, which contain various enable, priority and flag
bits.
REGISTER 8-1:
© 2006 Microchip Technology Inc.
INTCON Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON REGISTER
GIE/GIEH: Global Interrupt Enable bit
When IPEN = 0:
1 = Enables all unmasked interrupts
0 = Disables all interrupts
When IPEN = 1:
1 = Enables all high priority interrupts
0 = Disables all interrupts
PEIE/GIEL: Peripheral Interrupt Enable bit
When IPEN = 0:
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
When IPEN = 1:
1 = Enables all low priority peripheral interrupts
0 = Disables all low priority peripheral interrupts
TMR0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 overflow interrupt
0 = Disables the TMR0 overflow interrupt
INT0IE: INT0 External Interrupt Enable bit
1 = Enables the INT0 external interrupt
0 = Disables the INT0 external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
TMR0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INT0IF: INT0 External Interrupt Flag bit
1 = The INT0 external interrupt occurred (must be cleared in software)
0 = The INT0 external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = At least one of the RB7:RB4 pins changed state (must be cleared in software)
0 = None of the RB7:RB4 pins have changed state
Note:
Legend:
R = Readable bit
- n = Value at POR
bit 7
GIE/GIEH
R/W-0
A mismatch condition will continue to set this bit. Reading PORTB will end the
mismatch condition and allow the bit to be cleared.
PEIE/GIEL
R/W-0
W = Writable bit
’1’ = Bit is set
TMR0IE
R/W-0
INT0IE
R/W-0
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit. User software should ensure
the appropriate interrupt flag bits are clear
prior to enabling an interrupt. This feature
allows for software polling.
R/W-0
RBIE
TMR0IF
R/W-0
PIC18FXX2
x = Bit is unknown
INT0IF
R/W-0
DS39564C-page 75
R/W-x
RBIF
bit 0
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