LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 202
LPC2458FET180,551
Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2458FET180,551
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4258
935282454551
LPC2458FET180-S
935282454551
LPC2458FET180-S
Available stocks
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LPC2458FET180,551
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UM10237_4
User manual
6.3 GPIO port output Clear register IOCLR and FIOCLR (IO[0/1]CLR -
Table 166. Fast GPIO port output Set byte and half-word accessible register description
0xE002 80[0/1]C and FIO[0/1/2/3/4]CLR - 0x3FFF C0[1/3/5/7/9]C)
This register is used to produce a LOW level output at port pins configured as GPIO in an
OUTPUT mode. Writing 1 produces a LOW level at the corresponding port pin and clears
the corresponding bit in the IOSET register. Writing 0 has no effect. If any pin is configured
as an input or a secondary function, writing to IOCLR has no effect.
Legacy registers are the IO0CLR and IO1CLR while the enhanced GPIOs are supported
via the FIO0CLR, FIO1CLR, FIO2CLR, FIO3CLR, and FIO4CLR registers. Access to a
port pin via the FIOCLR register is conditioned by the corresponding bit of the FIOMASK
register (see
FIOMASK(FIO[0/1/2/3/4]MASK - 0x3FFF
Table 167. GPIO port output Clear register (IO0CLR - address 0xE002 800C and IO1CLR -
Table 168. Fast GPIO port output Clear register (FIO[0/1/2/3/4]CLR - address
Generic
Register
name
FIOxSET3
FIOxSETL
FIOxSETU
Bit
31:0
Bit
31:0
Symbol
P0xCLR
or
P1xCLR 0
Symbol
FP0xCLR
FP1xCLR
FP2xCLR
FP3xCLR
FP4xCLR
address 0xE002 801C) bit description
0x3FFF C0[1/3/5/7/9]C) bit description
Description
Fast GPIO Port x output Set
register 3. Bit 0 in FIOxSET3
register corresponds to pin
Px.24 ... bit 7 to pin Px.31.
Fast GPIO Port x output Set
Lower half-word register. Bit 0
in FIOxSETL register
corresponds to pin Px.0 ... bit
15 to pin Px.15.
Fast GPIO Port x output Set
Upper half-word register. Bit 0
in FIOxSETU register
corresponds to Px.16 ... bit
15 to Px.31.
Section 10–6.5 “Fast GPIO port Mask register
Value Description
1
Value Description
0
1
Rev. 04 — 26 August 2009
Slow GPIO output value Clear bits. Bit 0 in IOxCLR controls pin
Px.0, bit 31 in IOxCLR controls pin Px.31.
Controlled pin output is unchanged.
Controlled pin output is set to LOW.
Fast GPIO output value Clear bits. Bit 0 in FIOxCLR controls pin
Px.0, bit 31 controls pin Px.31.
Controlled pin output is unchanged.
Controlled pin output is set to LOW.
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
Register
length (bits)
& access
8 (byte)
R/W
16 (half-word)
R/W
16 (half-word)
R/W
C0[1/3/5/7/9]0)”).
Reset
value
0x00
0x0000 FIO0SETL - 0x3FFF C018
0x0000 FIO0SETU - 0x3FFF C01A
PORTn Register
Address & Name
FIO0SET3 - 0x3FFF C01B
FIO1SET3 - 0x3FFF C03B
FIO2SET3 - 0x3FFF C05B
FIO3SET3 - 0x3FFF C07B
FIO4SET3 - 0x3FFF C09B
FIO1SETL - 0x3FFF C038
FIO2SETL - 0x3FFF C058
FIO3SETL - 0x3FFF C078
FIO4SETL - 0x3FFF C098
FIO1SETU - 0x3FFF C03A
FIO2SETU - 0x3FFF C05A
FIO3SETU - 0x3FFF C07A
FIO4SETU - 0x3FFF C09A
UM10237
© NXP B.V. 2009. All rights reserved.
202 of 792
Reset
value
0x0
Reset
value
0x0
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