LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 502
LPC2458FET180,551
Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2458FET180,551
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4258
935282454551
LPC2458FET180-S
935282454551
LPC2458FET180-S
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
Company:
Part Number:
LPC2458FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
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UM10237_4
User manual
15.3 Standard Frame Individual Start Address Register (SFF_sa -
15.4 Standard Frame Group Start Address Register (SFF_GRP_sa -
0xE003 C004)
Table 444. Standard Frame Individual Start Address Register (SFF_sa - address
[1]
0xE003 C008)
Table 445. Standard Frame Group Start Address Register (SFF_GRP_sa - address
[1]
Bit
1:0
10:2
31:11 -
Bit
1:0
11:2
31:12 -
Write access to the look-up table section configuration registers are possible only during the Acceptance
filter bypass mode or the Acceptance filter off mode.
Write access to the look-up table section configuration registers are possible only during the Acceptance
filter bypass mode or the Acceptance filter off mode.
Symbol
-
SFF_sa
Symbol
-
SFF_GRP_sa
0xE003 C004) bit description
0xE003 C008) bit description
[1]
Description
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
The start address of the table of individual Standard Identifiers in AF
Lookup RAM. If the table is empty, write the same value in this register
and the SFF_GRP_sa register described below. For compatibility with
possible future devices, write zeroes in bits 31:11 and 1:0 of this
register. If the eFCAN bit in the AFMR is 1, this value also indicates the
size of the table of Standard IDs which the Acceptance Filter will search
and (if found) automatically store received messages in Acceptance
Filter RAM.
Reserved, user software should not write ones to reserved bits. The
value read from a reserved bit is not defined.
[1]
Rev. 04 — 26 August 2009
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
The start address of the table of grouped Standard Identifiers in
AF Lookup RAM. If the table is empty, write the same value in
this register and the EFF_sa register described below. The
largest value that should be written to this register is 0x800, when
only the Standard Individual table is used, and the last word
(address 0x7FC) in AF Lookup Table RAM is used. For
compatibility with possible future devices, please write zeroes in
bits 31:12 and 1:0 of this register.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 18: LPC24XX CAN controllers CAN1/2
UM10237
© NXP B.V. 2009. All rights reserved.
502 of 792
Reset
Value
NA
0
NA
Reset
Value
NA
0
NA
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