R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 160
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
14.1.3
Table 14.4
NOTE:
Count source
Count operations
Divide ratio
Count start condition
Count stop conditions • 0 (count stops) is written to the TSTART bit in the TRACR register.
Interrupt request
generation timing
INT1/TRAIO pin
function
TRAO pin function
Read from timer
Write to timer
Select functions
1. The level of the output pulse becomes the level when the pulse output starts when the TRAMR
In event counter mode, external signal inputs to the INT1/TRAIO pin are counted (refer to Table 14.4 Event
Counter Mode Specifications).
Figure 14.7 shows the TRAIOC Register in Event Counter Mode.
register is written to.
Feb 29, 2008
Item
Event Counter Mode
Event Counter Mode Specifications
External signal which is input to TRAIO pin (active edge selectable by a program)
• Decrement
• When the timer underflows, the contents of the reload register are reloaded and
1/(n+1)(m+1)
n: setting value of TRAPRE register, m: setting value of TRA register
1 (count starts) is written to the TSTART bit in the TRACR register.
• 1 (count forcibly stops) is written to the TSTOP bit in the TRACR register.
• When timer RA underflows [timer RA interrupt].
Count source input (INT1 interrupt input)
Programmable I/O port or pulse output
The count value can be read by reading registers TRA and TRAPRE.
• When registers TRAPRE and TRA are written while the count is stopped, values
• When registers TRAPRE and TRA are written during the count, values are
• NT1 input polarity switch function
• Count source input pin select function
• Pulse output function
• Digital filter function
Page 141 of 485
the count is continued.
are written to both the reload register and counter.
written to the reload register and counter (refer to 14.1.1.1 Timer Write Control
during Count Operation).
The TEDGSEL bit in the TRAIOC register selects the active edge of the count
source.
P1_7 or P1_5 is selected by the TIOSEL bit in the TRAIOC register.
Pulses of inverted polarity can be output from the TRAO pin each time the timer
underflows (selectable by the TOENA bit in the TRAIOC register).
Bits TIPF0 and TIPF1 in the TRAIOC register enable or disable the digital filter
and select the sampling frequency.
Specification
(1)
(1)
14. Timers
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