R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 327
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 16.2
SS Control Register H
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1.
2.
3.
The set clock is used w hen the internal clock is selected.
The SSCK pin functions as the transfer clock output pin w hen the MSS bit is set to 1 (operates as master device).
The MSS bit is set to 0 (operates as slave device) w hen the CE bit in the SSSR register is set to 1 (conflict error
occurs).
The RSSTP bit is disabled w hen the MSS bit is set to 0 (operates as slave device).
Feb 29, 2008
SSCRH Register
Bit Symbol
(b4-b3)
Symbol
SSCRH
RSSTP
CKS0
CKS1
CKS2
MSS
(b7)
Page 308 of 485
—
—
Transfer clock rate select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Master/slave device select bit
Receive single stop bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
00B8h
(3)
(2)
(1)
0 : Operates as slave device
1 : Operates as master device
0 : Maintains receive operation after
1 : Completes receive operation after
b2 b1 b0
0 0 0 : f1/256
0 0 1 : f1/128
0 1 0 : f1/64
0 1 1 : f1/32
1 0 0 : f1/16
1 0 1 : f1/8
1 1 0 : f1/4
1 1 1 : Do not set.
receiving 1 byte of data
receiving 1 byte of data
16. Clock Synchronous Serial Interface
After Reset
Function
00h
RW
RW
RW
RW
RW
RW
—
—
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