R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 417
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
19.2
Figure 19.1
0BFFFh
0C000h
0FFFFh
08000h
NOTES:
The flash memory contains a user ROM area and a boot ROM area (reserved area). Figure 19.1 shows the Flash
Memory Block Diagram for R8C/24 Group. Figure 19.2 shows a Flash Memory Block Diagram for R8C/25 Group.
The user ROM area of the R8C/25 Group contains an area (program ROM) which stores MCU operating programs
and blocks A and B (data flash) each 1 Kbyte in size.
The user ROM area is divided into several blocks. The user ROM area can be rewritten in CPU rewrite mode and
standard serial I/O and parallel I/O modes.
When rewriting blocks 0 and 1 in CPU rewrite mode, set the FMR02 bit in the FMR0 register to 1 (rewrite
enabled). When the FMR15 bit in the FMR1 register is set to 0 (rewrite enabled), block 0 is rewritable. When the
FMR16 bit is set to 0 (rewrite enabled), block 1 is rewritable.
The rewrite control program for standard serial I/O mode is stored in the boot ROM area before shipment. The boot
ROM area and the user ROM area share the same address, but have separate memory areas.
1. When the FMR02 bit in the FMR0 register is set to 1 (rewrite enabled) and the FMR15 bit in the FMR1 register is set to 0 (rewrite
2. This area is for storing the boot program provided by Renesas Technology.
enabled), block 0 is rewritable. When the FMR16 bit is set to 0 (rewrite enabled), block 1 is rewritable (only for CPU rewrite mode).
32 Kbytes ROM product
Memory Map
Block 0: 16 Kbytes
Feb 29, 2008
Block 1: 16 Kbytes
User ROM area
Flash Memory Block Diagram for R8C/24 Group
(1)
(1)
Page 398 of 485
0BFFFh
0BFFFh
0FFFFh
0C000h
0FFFFh
0C000h
0A000h
04000h
24 Kbytes ROM product
48 Kbytes ROM product
Block 0: 16 Kbytes
Block 0: 16 Kbytes
Block 1: 32 Kbytes
Block 1: 8 Kbytes
User ROM area
User ROM area
(1)
(1)
(1)
(1)
0BFFFh
0FFFFh
0FFFFh
0C000h
13FFFh
0C000h
04000h
10000h
16 Kbytes ROM product
64 Kbytes ROM product
Block 0: 16 Kbytes
Block 1: 32 Kbytes
Block 0: 32 Kbytes
User ROM area
User ROM area
(1)
(1)
(1)
0FFFFh
0E000h
Program ROM
Program ROM
(reserved area)
Boot ROM area
19. Flash Memory
8 Kbytes
(2)
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