R5F21256SNFP#U0 Renesas Electronics America, R5F21256SNFP#U0 Datasheet - Page 437
R5F21256SNFP#U0
Manufacturer Part Number
R5F21256SNFP#U0
Description
IC R8C MCU FLASH 32K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21256SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21256SNFP#U0R5F21256SNFP#ES
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
19.4.5
Table 19.6
NOTE:
1
1
0
FMR07(SR5) FMR06(SR4)
1. The MCU enters read array mode when FFh is written in the second bus cycle of these commands.
FMR0 Register (Status
When an error occurs, bits FMR06 to FMR07 in the FMR0 register are set to 1, indicating the occurrence of an
error. Therefore, checking these status bits (full status check) can be used to determine the execution result.
Table 19.6 lists the Errors and FMR0 Register Status. Figure 19.16 shows the Full Status Check and Handling
Procedure for Individual Errors.
At the same time, the command code written in the first bus cycle is disabled.
Register) Status
Feb 29, 2008
Full Status Check
Errors and FMR0 Register Status
1
0
1
Page 418 of 485
Command
sequence
error
Erase error
Program error
Error
• When a command is not written correctly
• When invalid data other than that which can be written
• When the program command or block erase command
• When an address not allocated in flash memory is input
• When attempting to erase the block for which rewriting
• When an address not allocated in flash memory is input
• When attempting to write to a block for which rewriting
• When the block erase command is executed but auto-
• When the program command is executed but not auto-
in the second bus cycle of the block erase command is
written (i.e., other than D0h or FFh)
is executed while rewriting is disabled by the FMR02 bit
in the FMR0 register, or the FMR15 or FMR16 bit in the
FMR1 register.
during erase command input
is disabled during erase command input.
during write command input.
is disabled during write command input.
erasure does not complete correctly
programming does not complete.
Error Occurrence Condition
(1)
19. Flash Memory
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