MCHC908MR8VFAE Freescale Semiconductor, MCHC908MR8VFAE Datasheet - Page 106

• Manufacturer Part Number: MCHC908MR8VFAE
• Description: IC MCU 8K FLASH 8MHZ PWM 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908MR8VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-LQFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

System Integration Module (SIM)
7.7.2 Stop Mode
7.7.3 SIM Break Status Register
Technical Data
106
NOTE:
In stop mode, the SIM counter is reset and the system clock is disabled.
An external interrupt request will cause an exit from stop mode. Stacking
for interrupts begins after the stop recovery delay time of 4096
CGMXCLK cycles has elapsed. Reset or break also cause an exit from
stop mode.
The SIM disables the clock generator module outputs in stop mode,
stopping the CPU and all peripherals.
It is important to note that when using the PWM generator Its outputs will
stop toggling when stop mode is entered. The PWM module must be
disabled before entering stop mode to prevent external inverter failure.
The SIM break status register (SBSR) contains a flag to indicate that a
break caused an exit from wait mode.
Reset:
SBSW — SIM Break Stop/Wait Bit
dress:
Read:
Write:
Ad-
This status bit is useful in applications requiring a return to wait mode
after exiting from a break interrupt. Clear SBSW by writing a logic 0 to
it. Reset clears SBSW.
1 = Wait mode was exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
$FE00
BIt 7
R
R
Figure 7-15. SIM Break Status Register (SBSR)
System Integration Module (SIM)
= Reserved
R
6
R
5
1. Writing a logic 0 clears SBSW.
R
4
R
3
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
R
2
Note
SBSW
1
0
(1)
Bit 0
R