D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 1295
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
D12321VF25V
Manufacturer:
Renesas
Quantity:
675
Company:
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Port Name
Pin Name
PF
PF
WAIT/
BREQO
PF
3
2
1
/LWR
/LCAS
/BACK
*
1
/
MCU
Operating
Mode
4 to 6
7
4 to 6
7
4 to 6
7
Reset
H
T
T
T
T
T
Hardware
Standby
Mode
T
T
T
T
T
T
Software
Standby Mode
[LWROD = 1]
kept
[LWROD · OPE = 1]
T
[LWROD · OPE = 1]
H
kept
[LCASE
BREQOE ·
BREQOPS +
WAITE · WAITPS
= 0
kept
[BREQOE ·
BREQOPS = 1]
and
[LCASE
kept
[WAITE · WAITPS
· DDR = 1]
and
[LCASE
BREQOE ·
BREQOPS = 0]
T
[LCASE
OPE = 0]
T
[LCASE
OPE = 1]
H
kept
[BRLE=0]
kept
[BRLE=1]
BACK
kept
*
*
*
*
*
2
2
2
2
2
+
+
= 0]
= 1,
= 1,
Rev.6.00 Sep. 27, 2007 Page 1263 of 1268
Bus-Released
State
[LWROD = 1]
kept
[LWROD = 0]
T
kept
[LCASE
BREQOE ·
BREQOPS +
WAITE · WAITPS
= 0
kept
[BREQOE ·
BREQOPS = 1]
and
[LCASE
BREQO
[WAITE · WAITPS
· DDR = 1]
and
[LCASE
BREQOE ·
BREQOPS = 0]
T
[LCASE
T
kept
L
kept
*
*
*
*
2
2
2
2
+
+
= 0]
= 1]
Appendix D Pin States
REJ09B0220-0600
Program
Execution State
Sleep Mode
[LWROD = 1]
I/O port
[LWROD = 0]
LWR
I/O port
[LCASE
BREQOE ·
BREQOPS +
WAITE · WAITPS
= 0
I/O port
[BREQOE ·
BREQOPS = 1]
and
[LCASE
BREQO
[WAITE · WAITPS
· DDR = 1]
and
[LCASE
BREQOE ·
BREQOPS = 0]
WAIT
[LCASE
LCAS
I/O port
[BRLE = 0]
I/O port
[BRLE = 1]
BACK
I/O port
*
1
*
*
*
*
2
2
2
2
+
+
= 0]
= 1]
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