D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 250

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 7 DMA Controller (Not Supported in the H8S/2321)
• Module stop mode can be set
7.1.2
A block diagram of the DMAC is shown in figure 7.1.
Rev.6.00 Sep. 27, 2007 Page 218 of 1268
REJ09B0220-0600
⎯ External request
⎯ Auto-request
⎯ The initial setting enables DMAC registers to be accessed. DMAC operation is halted by
Internal interrupts
External pins
Interrupt signals
Legend:
DMAWER: DMA write enable register
DMATCR: DMA terminal control register
DMABCR: DMA band control register (for all channels)
DMACR:
MAR:
IOAR:
ETCR:
setting module stop mode
Block Diagram
TGI0A
TGI1A
TGI2A
TGI3A
TGI4A
TGI5A
TXI0
RXI0
TXI1
RXI1
ADI
DREQ0
DREQ1
TEND0
TEND1
DACK0
DACK1
DEND0A
DEND0B
DEND1A
DEND1B
DMA control register
Memory address register
I/O address register
Execute transfer count register
Data buffer
Figure 7.1 Block Diagram of DMAC
Control logic
DMABCR
DMAWER
DMATCR
DMACR0A
DMACR0B
DMACR1A
DMACR1B
Internal address bus
Internal data bus
Address buffer
Processor
MAR0A
MAR0B
MAR1A
MAR1B
ETCR0A
ETCR0B
ETCR1A
ETCR1B
IOAR0A
IOAR0B
IOAR1A
IOAR1B