D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 273
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Bit 14—Source Address Increment/Decrement (SAID)
Bit 13—Source Address Increment/Decrement Enable (SAIDE): These bits specify whether
source address register MARA is to be incremented, decremented, or left unchanged, when data
transfer is performed.
Bit 14
SAID
0
1
Bit 12—Block Direction (BLKDIR)
Bit 11—Block Enable (BLKE): These bits specify whether normal mode or block transfer mode
is to be used. If block transfer mode is specified, the BLKDIR bit specifies whether the source side
or the destination side is to be the block area.
Bit 12
BLKDIR
0
1
For operation in normal mode and block transfer mode, see section 7.5, Operation.
Bits 10 to 7—Reserved: Can be read or written to. Only 0 should be written to these bits.
Bit 13
SAIDE
0
1
0
1
Bit 11
BLKE
0
1
0
1
Description
MARA is fixed
MARA is incremented after a data transfer
•
•
MARA is fixed
MARA is decremented after a data transfer
•
•
Description
Transfer in normal mode
Transfer in block transfer mode, destination side is block area
Transfer in normal mode
Transfer in block transfer mode, source side is block area
When DTSZ = 0, MARA is incremented by 1 after a transfer
When DTSZ = 1, MARA is incremented by 2 after a transfer
When DTSZ = 0, MARA is decremented by 1 after a transfer
When DTSZ = 1, MARA is decremented by 2 after a transfer
Section 7 DMA Controller (Not Supported in the H8S/2321)
Rev.6.00 Sep. 27, 2007 Page 241 of 1268
REJ09B0220-0600
(Initial value)
(Initial value)
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