D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 747
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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16.4.3
The A/D converter has a built-in sample-and-hold circuit. The A/D converter samples the analog
input at a time t
conversion timing. Table 16.4 indicates the A/D conversion time.
As indicated in figure 16.5, the A/D conversion time includes t
length of t
time therefore varies within the ranges indicated in table 16.4.
In scan mode, the values given in table 16.4 apply to the first conversion time. In the second and
subsequent conversions the conversion time is as shown in table 16.5.
Input Sampling and A/D Conversion Time
D
φ
Address bus
Write signal
Input sampling
timing
ADF
varies depending on the timing of the write access to ADCSR. The total conversion
Legend:
(1):
(2):
t
t
t
D
SPL
CONV
:
D
after the ADST bit is set to 1, then starts conversion. Figure 16.5 shows the A/D
:
: A/D conversion time
ADCSR write cycle
ADCSR address
A/D conversion start delay
Input sampling time
(1)
(2)
Figure 16.5 A/D Conversion Timing
t
D
Section 16 A/D Converter (8 Analog Input Channel Version)
t
SPL
t
CONV
Rev.6.00 Sep. 27, 2007 Page 715 of 1268
D
and the input sampling time. The
REJ09B0220-0600
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