D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 880
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Quantity
Price
Company:
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
D12321VF25V
Manufacturer:
Renesas
Quantity:
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Company:
Part Number:
D12321VF25V
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Quantity:
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Section 19 ROM
Rev.6.00 Sep. 27, 2007 Page 848 of 1268
REJ09B0220-0600
φ
V
FWE
MD2 to MD0
RES
SWE bit
Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be
CC
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
2. When making a transition from boot mode to another mode, a mode programming setup time t
3. See section 22.2.6, Flash Memory Characteristics.
carried out by means of RES input. The state of ports with multiplexed address functions and bus control
output pins (AS, RD, WR) will change during this switchover interval (the interval during which the RES pin
input is low), and therefore these pins should not be used as output signals during this time.
ns is necessary with respect to RES clearance timing.
(Example: Boot Mode → User Mode ↔ User Program Mode)
t
OSC1
Mode
change
SWE
set
t
MDS
t
MDS
*1
Figure 19.58 Mode Transition Timing
Boot
mode
*3
SWE
cleared
Mode
change
t
RESW
Min 0 μs
t
MDS
*1
*2
User
mode
User program mode
User
mode
User program
mode
MDS
(min) of 200
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