M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 167
![IC M32C/80 MCU ROMLESS 100LQFP](/photos/12/19/121989/m30800sagp-bl_u_sml.jpg)
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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2
Figure 14.14 16-bit Pulse Width Modulator Operation
Figure 14.15 8-bit Pulse Width Modulator Operation
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
0 -
. v
Count source
Underflow signal of
8-bit prescaler
PWM pulse output
from TA
IR bit in TAiIC register
Signal applied to
TA
u
1
0
p
0
Signal applied
to TA
PWM pulse output
from TA
IR bit in TAiIC register
Count source
iIN
, 1
0
pin
NOTES:
f
m=00
i=0 to 4
j
2
f
n=0000
i=0 to 4
NOTE:
: Count source frequency
When the reload register is set to "0003
of a signal applied to the TAi
When 8 high-order bits of the reload register are set to "02
the reload register are set to "02
signal applied to the TAi
iOUT
iIN
j
1. 8-bit prescaler counts a count source.
2. 8-bit pulse width modulator counts underflow signals of the 8-bit prescaler.
3. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15).
0
(f
: Count source frequency
0
1
1. The CNT3 to CNT0 bits in the TCSPR register select no division (n=0) or divide-by-2n (n=1 to 15).
iOUT
pin
, f
5
(f
16
1
pin
8
(1)
, f
, f
(2)
to FF
Page 146
16
pin
8
2n (3)
, f
to FFFE
2n (1)
16
, f
, n=00
C32
, f
“H”
“H”
“H”
“1”
“0”
“L”
“L”
“L”
C32
)
16
“H”
“H”
“L”
“L”
“1”
“0”
)
16
f o
to FE
3
3
0
16
IN
pin) is selected
IN
pin) is selected
Set to "0" by an interrupt request acknowledgement or by program
16
" and an external trigger (on falling edge of a
No trigger occurs by this signal
1 / f
16
Set to "0" by an interrupt request
acknowledgement or by program
1 / f
1 / f
" and an external trigger (on rising edge
j
X (m + 1)
1 / f
1 / f
j
i
X
X
j
j
(2
n
X (m + 1) X (2
X (m + 1) X n
16
– 1)
16
8
", 8 low-order bits of
– 1)
14. Timer (Timer A)
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