M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 247
![IC M32C/80 MCU ROMLESS 100LQFP](/photos/12/19/121989/m30800sagp-bl_u_sml.jpg)
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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M
R
R
e
E
3
. v
J
2
Figure 17.6 AD00 to AD07 Registers
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
b15
N
A/D0 Register i (i =0 to 7)
1
o
o r
NOTES:
0 -
. v
u
1. In DMAC operating mode, register value read by program is indeterminate.
2. Register value is indeterminate when written while the A/D conversion is stopped.
3. Register value is indeterminate if the next A/D conversion result is stored before reading the register.
4. The AD00 register is available in DMAC operating mode. Other registers are indeterminate.
5. In DMAC operating mode and 10-bit mode, set DMAC for a 16-bit transfer.
1
p
0
0
, 1
0
2
0
b8
0
5
b7
Page 226
b0
Symbol
AD00
AD01 to AD03 0383
AD04 to AD06 0389
AD07
f o
8 low-order bits in an A/D conversion result
In 10-bit mode: 2 high-order bits in an A/D conversion result
In 8-bit mode: when read, its content is indeterminate.
When read, its content is indeterminate.
3
3
0
(1, 2, 3, 4, 5)
Address
0381
038F
16
16
16
16
- 0380
- 0382
- 0388
- 038E
16
16
16
16
, 0385
, 038B
Function
16
16
- 0384
- 038A
16
16
, 0387
, 038D
16
16
- 0386
- 038C
16
16
After Reset
00000000 XXXXXXXX
Indeterminate
Indeterminate
Indeterminate
17. A/D Converter
RW
RO
RO
RO
2
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