MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 193

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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4.4.10.1
Wake-up from pseudo-stop is the same as wake-up from wait mode. There are also three different scenarios
for the CRG to restart the MCU from pseudo-stop mode:
Freescale Semiconductor
Exit Stop w.
CMRESET
External reset
Clock monitor fail
Wake-up interrupt
no
Wake-Up from Pseudo-Stop (PSTP=1)
Stop Mode
SCME=1
Enter
SCM
Exit
?
yes
Exit Stop w.
ext.RESET
no
no
Figure 4-24. Stop Mode Entry/Exit Sequence
Stop Mode
Clock
Exit
INT
OK
?
?
due to external
Wait Mode left
yes
yes
MC9S12E128 Data Sheet, Rev. 1.07
no
(Wakeup from Stop)
SCM Interrupt
Disable PLL
Generate
Continue w.
Stop Mode.
Exit Stop w.
Stop Mode
normal OP
CMRESET
Core req’s
PLLSEL,
PSTP=1
Enter
Clear
?
yes
no
Chapter 4 Clocks and Reset Generator (CRGV4)
Stop Mode
SCMIE=1
SCME=1
CME=1
CM fail
Enter
SCM
Exit
?
?
?
?
yes
yes
yes
yes
no
no
no
Stop Mode
SCM=1
Enter
SCM
Exit
INT
?
?
yes
yes
no
no
193

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