MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 383

IC MCU 128K FLASH 25MHZ 112-LQFP

MC9S12E128CPVE

Manufacturer Part Number
MC9S12E128CPVE
Description
IC MCU 128K FLASH 25MHZ 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E128CPVE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
91
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
92
Number Of Timers
12
Operating Supply Voltage
3.135 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
90
Ram Memory Size
8KB
Cpu Speed
25MHz
No. Of Timers
4
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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12.2.4
This pin serves as waveform output of PWM channel 2.
12.2.5
This pin serves as waveform output of PWM channel 1.
12.2.6
This pin serves as waveform output of PWM channel 0.
12.3
This subsection describes in detail all the registers and register bits in the PWM8B6CV1 module.
The special-purpose registers and register bit functions that would not normally be made available to
device end users, such as factory test control registers and reserved registers are clearly identified by means
of shading the appropriate portions of address maps and register diagrams. Notes explaining the reasons
for restricting access to the registers and functions are also explained in the individual register descriptions.
12.3.1
The following paragraphs describe the content of the registers in the PWM8B6CV1 module. The base
address of the PWM8B6CV1 module is determined at the MCU level when the MCU is defined. The
register decode map is fixed and begins at the first address of the module address offset.
the registers associated with the PWM and their relative offset from the base address. The register detail
description follows the order in which they appear in the register map.
Reserved bits within a register will always read as 0 and the write will be unimplemented. Unimplemented
functions are indicated by shading the bit.
Table 12-1
Freescale Semiconductor
Memory Map and Register Definition
shows the memory map for the PWM8B6CV1 module.
PWM2 — Pulse Width Modulator Channel 2 Pin
PWM1 — Pulse Width Modulator Channel 1 Pin
PWM0 — Pulse Width Modulator Channel 0 Pin
Module Memory Map
Register address = base address + address offset, where the base address is
defined at the MCU level and the address offset is defined at the module
level.
MC9S12E128 Data Sheet, Rev. 1.07
NOTE
Chapter 12 Pulse-Width Modulator (PWM8B6CV1)
Table 12-1
shows
383

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