MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 398

• Manufacturer Part Number: MC9S12E128CPVE
• Description: IC MCU 128K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 90
• Ram Memory Size: 8KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 12 Pulse-Width Modulator (PWM8B6CV1)
Read: anytime
Write: anytime (any value written causes PWM counter to be reset to 0x0000).
12.3.2.13 PWM Channel Period Registers (PWMPERx)
There is a dedicated period register for each channel. The value in this register determines the period of
the associated PWM channel.
The period registers for each channel are double buffered so that if they change while the channel is
enabled, the change will NOT take effect until one of the following occurs:
In this way, the output of the PWM will always be either the old waveform or the new waveform, not some
variation in between. If the channel is not enabled, then writes to the period register will go directly to the
latches as well as the buffer.
Reference
398
Reset
Reset
Reset
•
•
•
W
W
W
R
R
R
The effective period ends
The counter is written (counter resets to 0x0000)
The channel is disabled
Section 12.4.2.3, “PWM Period and Duty,”
Bit 7
Bit 7
Bit 7
0
0
0
0
0
0
7
7
7
Reads of this register return the most recent value written. Reads do not
necessarily return the value of the currently active period due to the double
buffering scheme.
Figure 12-18. PWM Channel Counter Registers (PWMCNT3)
Figure 12-19. PWM Channel Counter Registers (PWMCNT4)
Figure 12-20. PWM Channel Counter Registers (PWMCNT5)
6
0
0
6
0
0
6
0
0
6
6
6
MC9S12E128 Data Sheet, Rev. 1.07
5
0
0
5
0
0
5
0
0
5
5
5
NOTE
4
0
0
4
0
0
4
0
0
4
4
4
for more information.
3
0
0
3
0
0
3
0
0
3
3
3
2
0
0
2
0
0
2
0
0
2
2
2
Freescale Semiconductor
1
0
0
1
0
0
1
0
0
1
1
1
Bit 0
Bit 0
Bit 0
0
0
0
0
0
0
0
0
0