MC9S12E128CPVE Freescale Semiconductor, MC9S12E128CPVE Datasheet - Page 412

• Manufacturer Part Number: MC9S12E128CPVE
• Description: IC MCU 128K FLASH 25MHZ 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E128CPVE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 92
• Number Of Timers: 12
• Operating Supply Voltage: 3.135 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 90
• Ram Memory Size: 8KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 12 Pulse-Width Modulator (PWM8B6CV1)
When using the 16-bit concatenated mode, the clock source is determined by the low-order 8-bit channel
clock select control bits. That is channel 5 when channels 4 and 5 are concatenated, channel 3 when
channels 2 and 3 are concatenated, and channel 1 when channels 0 and 1 are concatenated. The resulting
PWM is output to the pins of the corresponding low-order 8-bit channel as also shown in
The polarity of the resulting PWM output is controlled by the PPOLx bit of the corresponding low-order
8-bit channel as well.
After concatenated mode is enabled (CONxx bits set in PWMCTL register), enabling/disabling the
corresponding 16-bit PWM channel is controlled by the low-order PWMEx bit. In this case, the high-order
bytes PWMEx bits have no effect and their corresponding PWM output is disabled.
In concatenated mode, writes to the 16-bit counter by using a 16-bit access or writes to either the low or
high-order byte of the counter will reset the 16-bit counter. Reads of the 16-bit counter must be made by
16-bit access to maintain data coherency.
Either left aligned or center aligned output mode can be used in concatenated mode and is controlled by
the low-order CAEx bit. The high-order CAEx bit has no effect.
412
Clock Source 5
Clock Source 3
Clock Source 1
Figure 12-40. PWM 16-Bit Mode
MC9S12E128 Data Sheet, Rev. 1.07
PWMCNT4
PWMCNT2
PWMCNT0
High
High
High
Period/Duty Compare
Period/Duty Compare
Period/Duty Compare
PWCNT5
PWCNT3
PWCNT1
Low
Low
Low
PWM5
PWM3
PWM1
Freescale Semiconductor
Figure
12-40.